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Add sources and libraries to a custom peripheral

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vcesson's picture
vcesson
Junior(0)
Add sources and libraries to a custom peripheral

Hello,

I want to create a custom peripheral to use OLED on Zedboard. I reused this project: http://www.zedboard.org/node/511
This project uses the core "charLib" (files are already included in the project).

I do the following steps:
- in XPS, create a new IP, named "zedoled"
- change zedoled.vhd and user_logic.vhd with new connections to the other modules
- re-import my IP, including libraries (proc_common_..., axi_lite_ipif_...) and all VHDL files
- add my IP to my design
- Ports: connect to external port
- go back to PlanAhead, create Top Hdl and create ucf file
- generate bitstream

The problem: Synthesis is OK, but during Implementation, the module charLib cannot be resolved, even so this module is described in charLib.vhd that I included when re-importing my IP.
It 's strange because all other modules are recognized successfully... I'm sure that names match correctly and I'm sure the file is including in the sources.

m.russell's picture
m.russell
Junior(0)
Hi

Hi

Have you added the additional files to the .pao file in the data folder?

Matthew

vcesson's picture
vcesson
Junior(0)
Yes, I have the following

Yes, I have the following line in the .pao file:
lib zedoled_v1_00_a charLib vhdl

And PlanAhead says:
[Designutils 20-1022] Could not resolve non-primitive black box cell 'charLib' instantiated in module 'proc_module_i/zedoled_0/zedoled_0/USER_LOGIC_I/OLED_CTRL_0/Example/CHAR_LIB_COMP'.

m.russell's picture
m.russell
Junior(0)
OK, how did you re-import the

OK, how did you re-import the IP? XPS can be a bit tricky so I use the mpd and pao files in the Import Peripheral Wizard.

Matthew

vcesson's picture
vcesson
Junior(0)
I import the IP using only

I import the IP using only the vhdl files. Maybe that's the problem. I will try an other way.
Thanks

vcesson's picture
vcesson
Junior(0)
I have finally found the

I have finally found the solution:
I included the charLib.vhdl file in my sources. This is wrong. charLib must be used as a blackbox, so the netlist file must be used instead: charLic.ngc.
During peripheral importation, at "source file type" window, check "HDL source files" and "Netlist files" boxes. The netlist file is added after the HDL sources.

But I still don't understand why the module charLib could not be resolved whereas it is described it the vhdl file...

zedhed's picture
zedhed
Moderator(22)
RE: Add sources and libraries to a custom peripheral

Hi vcesson,

Can you please post the contents of your .pao file for the community to look at?

I seem to remember that the list order of the dependency files in the Peripheral Analysis Order file is important.

Regards,

-Kevin

vcesson's picture
vcesson
Junior(0)
PAO file:

PAO file:
##############################################################################
## Filename: C:\Xilinx\Projects\zedoled_charlib\zedoled_charlib.srcs\sources_1\edk\proc_module\pcores/PmodOLEDCtrl_v1_00_a/data/PmodOLEDCtrl_v2_1_0.pao
## Description: Peripheral Analysis Order
## Date: Tue Mar 19 14:27:38 2013 (by Create and Import Peripheral Wizard)
##############################################################################

lib PmodOLEDCtrl_v1_00_a Delay vhdl
lib PmodOLEDCtrl_v1_00_a OledExample vhdl
lib PmodOLEDCtrl_v1_00_a OledInit vhdl
lib PmodOLEDCtrl_v1_00_a PmodOLEDCtrl vhdl
lib PmodOLEDCtrl_v1_00_a SpiCtrl vhdl

BBD file:
##############################################################################
## Filename: C:\Xilinx\Projects\zedoled_charlib\zedoled_charlib.srcs\sources_1\edk\proc_module\pcores/PmodOLEDCtrl_v1_00_a/data/PmodOLEDCtrl_v2_1_0.bbd
## Description: Black Box Definition
## Date: Tue Mar 19 14:27:38 2013 (by Create and Import Peripheral Wizard)
##############################################################################

Files
################################################################################
charLib.ngc

Also I have the following line in my MPD:
OPTION RUN_NGCBUILD = TRUE

JeremyG's picture
JeremyG
Junior(0)
additional detail

Thank you for that vcesson, you saved me, I could not find any other info anywhere on how to import a peripheral that contains other cores. In my case I was trying to import a peripheral with a block RAM core and was going crazy with this error.

While I was able to finally work around this using vcesson's solution (i.e. import the .ncd file for the other core, but NOT the .v/.vhd file!), however the compiler was still complained about not finding the HDL file. What I ended up doing was simply pasting in the entire IP Core functional model directly into my peripheral code so that I only end up with a single file. Works for now, in the future should really find a better solution.