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AMP Connect HW to ARM1 Bare-Metal with Linux on ARM0

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mikefjones
Junior(0)
AMP Connect HW to ARM1 Bare-Metal with Linux on ARM0

How do I tell Linux which devices are available to ARM1 running a bare metal application?

I've built and run Xapp1078 successfully. I've added UART0 through EMIO to the HW. I built a new device-tree for Linux. The Linux app rwmem.elf can access the UART0 memory at 0xE0000000.

When running the bare-metal app with the debugger I cannot access UART0 at 0xE0000000. I can however access UART1 at 0xE0001000. I can write to the Linux console from ARM1.

I have successfully accessed UART0 from a standalone app.

I need to configure the system to access UART0 and other HW from ARM1 (i.e. SPI0, SPI1, etc.). This seems like it should be simple to do but I've not been very successful.

mikefjones
Junior(0)
device-tree.dts

Here is the device-tree.dts for this Linux run.
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-zc770";
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_1;
serial1 = &ps7_uart_0;
} ;
chosen {
bootargs = "console=ttyPS0,115200 root=/dev/ram rw ip=:::::eth0:dhcp earlyprintk maxcpus=1";
linux,stdout-path = "/amba@0/serial@e0001000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x2>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
compatible = "xlnx,ps7-cortexa9-1.00.a";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "ps7_cortexa9,1.00.a";
reg = <0>;
xlnx,cpu-1x-clk-freq-hz = <0x54c563d>;
xlnx,cpu-clk-freq-hz = <0x1fca057e>;
} ;
ps7_cortexa9_1: cpu@1 {
compatible = "xlnx,ps7-cortexa9-1.00.a";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "ps7_cortexa9,1.00.a";
reg = <1>;
xlnx,cpu-1x-clk-freq-hz = <0x54c563d>;
xlnx,cpu-clk-freq-hz = <0x1fca057e>;
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 5 4 0 6 4 >;
reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = < 0x0 0x0F000000 >;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges ;
irq_gen_0: irq-gen@78600000 {
compatible = "xlnx,irq-gen-1.00.a";
reg = < 0x78600000 0x10000 >;
xlnx,dphase-timeout = <0x8>;
xlnx,family = "zynq";
xlnx,num-mem = <0x1>;
xlnx,num-reg = <0x1>;
xlnx,s-axi-min-size = <0x1ff>;
xlnx,slv-awidth = <0x20>;
xlnx,slv-dwidth = <0x20>;
xlnx,use-wstrb = <0x0>;
} ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = < 0xf8008000 0x1000 >;
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = < 0xf8009000 0x1000 >;
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = < 0xf800a000 0x1000 >;
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = < 0xf800b000 0x1000 >;
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
reg = < 0xf8006000 0x1000 >;
xlnx,has-ecc = <0x0>;
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
compatible = "xlnx,ps7-dev-cfg-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 8 4 >;
reg = < 0xf8007000 0x1000 >;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
arm,primecell-periphid = <0x41330>;
compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
reg = < 0xf8003000 0x1000 >;
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 22 1 >;
local-mac-address = [ 00 0a 35 00 00 00 ];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = < 0xe000b000 0x1000 >;
xlnx,enet-clk-freq-hz = <0x7735940>;
xlnx,enet-reset = <0xffffffff>;
xlnx,enet-slcr-1000mbps-div0 = <0x8>;
xlnx,enet-slcr-1000mbps-div1 = <0x1>;
xlnx,enet-slcr-100mbps-div0 = <0x8>;
xlnx,enet-slcr-100mbps-div1 = <0x5>;
xlnx,enet-slcr-10mbps-div0 = <0x8>;
xlnx,enet-slcr-10mbps-div1 = <0x32>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <88888893>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@7 {
compatible = "marvell,88e1116r";
device_type = "ethernet-phy";
reg = <7>;
} ;
} ;
} ;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
compatible = "xlnx,ps7-gpio-1.00.a";
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 20 4 >;
reg = < 0xe000a000 0x1000 >;
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = < 0xe0200000 0x1000 >;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = < 3 2 2 >;
arm,tag-latency = < 2 2 2 >;
cache-level = < 2 >;
cache-unified ;
compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 2 4 >;
reg = < 0xf8f02000 0x1000 >;
} ;
ps7_qspi_0: ps7-qspi@e000d000 {
bus-num = <2>;
compatible = "xlnx,ps7-qspi-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 19 4 >;
is-dual = <0>;
num-chip-select = <1>;
reg = < 0xe000d000 0x1000 >;
speed-hz = <200000000>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x0>;
} ;
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
compatible = "xlnx,ps7-qspi-linear-1.00.a";
reg = < 0xfc000000 0x1000000 >;
xlnx,qspi-clk-freq-hz = <0xe4e1c0>;
} ;
ps7_ram_0: ps7-ram@0 {
compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
reg = < 0xfffc0000 0x40000 >;
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = < 2 >;
#interrupt-cells = < 3 >;
#size-cells = < 1 >;
compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
interrupt-controller ;
linux,phandle = < 0x1 >;
phandle = < 0x1 >;
reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 1 13 769 >;
reg = < 0xf8f00600 0x20 >;
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 1 14 769 >;
reg = < 0xf8f00620 0xe0 >;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <50000000>;
compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 24 4 >;
reg = < 0xe0100000 0x1000 >;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
reg = < 0xf8000000 0x1000 >;
clocks {
#address-cells = <1>;
#size-cells = <0>;
armpll: armpll {
#clock-cells = <0>;
clock-output-names = "armpll";
clocks = <&ps_clk>;
compatible = "xlnx,zynq-pll";
lockbit = <0>;
reg = < 0x100 0x110 0x10c >;
} ;
ddrpll: ddrpll {
#clock-cells = <0>;
clock-output-names = "ddrpll";
clocks = <&ps_clk>;
compatible = "xlnx,zynq-pll";
lockbit = <1>;
reg = < 0x104 0x114 0x10c >;
} ;
iopll: iopll {
#clock-cells = <0>;
clock-output-names = "iopll";
clocks = <&ps_clk>;
compatible = "xlnx,zynq-pll";
lockbit = <2>;
reg = < 0x108 0x118 0x10c >;
} ;
ps_clk: ps_clk {
#clock-cells = <0>;
clock-frequency = <33333333>;
clock-output-names = "ps_clk";
compatible = "fixed-clock";
} ;
} ;
} ;
ps7_spi_0: ps7-spi@e0006000 {
bus-num = <0>;
compatible = "xlnx,ps7-spi-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 26 4 >;
num-chip-select = <4>;
reg = < 0xe0006000 0x1000 >;
speed-hz = <100000000>;
xlnx,has-ss0 = <0x1>;
xlnx,has-ss1 = <0x1>;
xlnx,has-ss2 = <0x1>;
xlnx,spi-clk-freq-hz = <0x5f5e100>;
} ;
ps7_spi_1: ps7-spi@e0007000 {
bus-num = <1>;
compatible = "xlnx,ps7-spi-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 49 4 >;
num-chip-select = <4>;
reg = < 0xe0007000 0x1000 >;
speed-hz = <100000000>;
xlnx,has-ss0 = <0x1>;
xlnx,has-ss1 = <0x1>;
xlnx,has-ss2 = <0x1>;
xlnx,spi-clk-freq-hz = <0x5f5e100>;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 10 4 0 11 4 0 12 4 >;
reg = < 0xf8001000 0x1000 >;
} ;
ps7_uart_0: serial@e0000000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 27 4 >;
port-number = <1>;
reg = < 0xe0000000 0x1000 >;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
} ;
ps7_uart_1: serial@e0001000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 50 4 >;
port-number = <0>;
reg = < 0xe0001000 0x1000 >;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
} ;
ps7_usb_0: ps7-usb@e0002000 {
compatible = "xlnx,ps7-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 21 4 >;
phy_type = "ulpi";
reg = < 0xe0002000 0x1000 >;
xlnx,usb-reset = <0xffffffff>;
} ;
ps7_xadc: ps7-xadc@f8007100 {
compatible = "xlnx,ps7-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 7 4 >;
reg = < 0xf8007100 0x20 >;
} ;
} ;
} ;

mikefjones
Junior(0)
ISE 14.6 Resolves the Problem

The XSDK libraries from ISE 14.6 appear to have solved the problem. I have successfully written to UART0 and the LEDs.