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Control PMBUS regulators from Zynq Ultrascale+ PS

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Gouthamp's picture
Gouthamp
Junior(0)
Control PMBUS regulators from Zynq Ultrascale+ PS

Hi, 

I have been using USB-005 Infineon dongle , connected to PMBUS header in the Carrier Card. I am trying to move away from that method and use ZYnq Ultrascale+ PS to control the PMBUS regulator in SoM. I can see from the https://products.avnet.com/opasdata/d120001/medias/docus/138/AES-ZU3EGES-1-SK-G-UltraZed-SOM-Designers-Guide-v1-1.pdf that I can use I2C inteface through MIO 24:25 in the zynq ultrascale+ to control PMBUS regulators . Do I need to take off/on any jumper in the carrier card/SoM to do this? I am using Ultrazed IO Carrier Card.

I am planning to write PMBUS Commands from Linux application , through I2C bus [MIO 24:25] to  the voltage regulators on SoM. I do observe from table in page 12 of the document that channel 1 is the master channel of I2C that is connected to PS. I also see that channel 2 of that I2C switch is the slave channel that is connected to voltage regulator in SoM. Can someone direct me how to communicate my commands from master channel (connected to PS) to slave channel (connected to voltage regulator)
I suppose I would need addresses of the slave channel to write from Master channel . Am I thinking right?
 
Thanks
Goutham

Gouthamp's picture
Gouthamp
Junior(0)
Access Channel-1 of I2C MUX from Linux

Hi , 

I can find the i2c mux channel-1 in /sys/bus/i2c/devices/0-0070/channel-1 of my linux. I know channel-1 is connected directly to PMBUS voltage regulator of SoM. Can someone give a glimpse on how I can communicate to channel-1 thru Linux so that I can send SMBUS command to Voltage Regulator.

Thanks
Goutham

goutham.p's picture
goutham.p
Junior(0)
Developments

Hi ,
With the aim of controlling SoM's Voltage regulators using i2c driver in linux, these are the steps I have done till now. 
1) Connected Jumper JP2 and JP3 that short circuits I2c MUX to the PMBUS regulator according to page 3 of AES-ZU3EGES-1-SOM-G schematic
​2) used i2-c utilities in linux to list out available i2c devices in the kernel. and that gives the output
root@plnx_aarch64:/# i2cdetect -l
i2c-0   i2c             Cadence I2C at ff030000                 I2C adapter
i2c-1   i2c             i2c-0-mux (chan_id 0)                   I2C adapter
i2c-2   i2c             i2c-0-mux (chan_id 1)                   I2C adapter

3) Hence I believe that i2c-2 is the device I should open in C program to talk to SoM PMBUS regulators connected thru Channel-1. I also tried to dump available devices in i2c-2using i2c-detect
 
root@plnx_aarch64:/# i2cdetect -y -r 2
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: UU -- -- -- -- -- -- --
root@plnx_aarch64:/# i2cdetect -y -r 1
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: 50 -- UU UU UU UU -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: UU -- -- -- -- -- -- --
root@plnx_aarch64:/# i2cdetect -y -r 0
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: 50 -- UU UU UU UU -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: UU -- -- -- -- -- -- --

​I do understand that i2c mux is addressed to 70 because that is the address in device tree nod. My question is how can I use C program to access the SoM's voltage regulators. What is the slave device address I need to use to get access to the PMBUS chip IRPS5401M in SoM. From page 18 of datasheet of IRPS5401 , i2c address is defaulted to 10h. But I do not quite get the SMBUS to work by using that slave address in C program.

/* PMBUS Commands */
#define CMD_PAGE                   0x00
#define CMD_READ_VOUT         0x8B

int main ()
{
 int file;
 int status;
    float voltage;

   file = open("/dev/i2c-2", O_RDWR);
   if (file < 0) {
     /* ERROR HANDLING; you can check errno to see what went wrong */
    printf("Unable to open i2c device\n");
     exit(1);
   }

   if (ioctl(file, I2C_SLAVE, 0x11) < 0) {
     printf("ERROR: Unable to set I2C slave address \n");
     exit(1);
    }

  status = i2c_smbus_write_byte_data(file, CMD_PAGE, 1);
  if (status < 0) {
   printf("ERROR: Unable to write page address to I2C slave : %d\n", status);
   exit(1);
  }

  /* Read in the voltage value */
  status = i2c_smbus_read_word_data(file, 0x98);
  if(status < 0) {
   printf("ERROR: Unable to read VOUT on I2C slave %d\n", status);
   exit(1);
  }

  voltage = status / 4096.0f;
  printf("Voltage= %0.2f\n", voltage);

 return 0;
}
Read and write of SMBUS commands fails. I think problem lies in selecting the right slave address. We have brought 10 Avnet ultrazed boards and really want this feature to work .Please shed some light . A reference design of controlling/monitoring PMBUS chip from linux OS in PS should work for me. Any help would be really appreciated.

 

Gouthamp's picture
Gouthamp
Junior(0)
Petalinux 2016.2 bsp with correct slavee address?

Hi ,

I was just wondering if 2016.2 bsp of ultrazed has correct i2c mux slave address. Ruling out problem with my kernel configuration. I am going to try it anyway. Any suggestion/feedback is welcome .

JFoster's picture
JFoster
Moderator(55)
Hello Gouthamp,

Hello Gouthamp,

Sorry for the delay, we were discussing this internally.

Once again I must stress that modifying the PMBUS in anyway will void your warranty with Avnet. I know I have already told you this in your previous post, however this is more so for anyone else whom may be reading this post.

In order to view the I2C/PMBUS registers on the UltraZed-EG SOM a user would need to ensure that the two I2C/PMBUS shunts are placed on the SOM. These are populated by default from the CM as we don’t anticipate most customers modifying the Infineon power supplies. The shunts should be placed on JP2/JP3. This allows the Zynq device through the I2C Mux to see the Infineon devices.

Now, for addressing. The I2C/PMBUS has three address on the UltraZed-EG Starter Kit. The ES1 silicon exists at I2C address 0x10/0x11/0x12 and PMBUS addresses 0x40/0x41/0x42. For production silicon, the addresses have been offset by 0x03 to support an errata published by Infineon. These addresses are therefore now at 0x13/0x14/0x15 and PMBUS addresses 0x43/0x44/0x45.

The end users have the option of enabling one path, the other path, or both paths of the I2C Mux depending on which paths they need to access. This requires the end user to perform an I2C access to the I2C Mux in order to set this up.

In order for the customer not to potentially ruin their SOM by experimenting with the power rails, they would need to fully understand the Infineon devices and its register sets as well as the various power modes and means to enter and exit them from the MPSoC devices perspective. This is no small task to get right and easy to get wrong. Perhaps Xilinx has offered a low power XAPP for the MPSoC? That would be something to check into.

Regards,

Josh

Gouthamp's picture
Gouthamp
Junior(0)
Hi Josh,

Hi Josh,
Thanks for the response. Yes, I know about the warranty issue. Thanks for mentioning again.

 About I2C addresses, I have been following the reference design that Xilinx provided for the same application , but for Zynq-7000 ZC702.I had also connected the shunts JP2 and JP3 in SoM. , I have been using 0x11 as in my user application as you can see in my previous post. But writing to that slave address gives write error . 
I am sure I am using right address for MUX in dts . It is 0x70 as mentioned in datasheet for TCA9543 and shematic of Ultrazed SoM (production Silicon).  Due to some or other reason, the mux name is given as pca9542 in dts provided by avnet , while it is TCA9543 right? 

I could have attached the C files I am using that I got the reference design mentioned now. But do not see attach option here. 
The reference design mentioned here seems to be very close with what I need . I think I am missing the part of configuration of MUX to get access to channel-1. As given in the datasheet, after addressing of MUX( which I believe is when that /debv/i2-2 is opened), I will have to write to control register to select channel-1 using C application , and then try to read from 0x11 slave address. I am guessing this flow. It would be really helpful if there is a reference design for this , similar to the one I mentioned. 
 
Goutham
 
 

 

JFoster's picture
JFoster
Moderator(55)
Hello Goutham,

Hello Goutham,

We have a low power reference design on the road map, however it will not be available for sometime.

--Josh