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DDR3 CKE recommendation

Xilinx has recently changed their recommendation for DDR3 CKE.  ZedBoard Rev C implements a 4.7K-ohm pulldown to GND.  The new recommendation is a 40-ohm pull-up to Vtt.
The Micron spec only requires CKE to be low 10ns before RESET#, unlike DDR2 where the term was longer. Since the Zynq controller drives CKE low, that 10ns requirement is met.  The termination to VTT could be important for self-refresh users, as CKE will toggle more often than just startup. The 4.7K pulldown may lead to poor SI on this potentially high-frequency signal.

TimDuffy's picture


Does this apply for both the PS *and* any PL MIG based DDR3 interface(s)? Or just the PS connection(s)?

This applies to all DDR3.  MIG is being updated to reflect this even for other 7-series.  If you look at a Micron DIMM, this is how it is done on the DDR3 DIMMs.