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DisplayPort on PCIe carrier card?

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DisplayPort on PCIe carrier card?

We've got DP working on our IO carrier card, and would like to get it running on the PCIe card (since we really need the FMC for some peripherals).
If we just boot the PCIeCC with the IOCC reference design, it comes up and can read the EDID of the monitor.  X starts without problems and the tricube demo happily runs.  However, the display doesn't actually work, since one of the GTX lines is going to the USB3 port, and only one remains for DisplayPort.  I can change the hardware design to use only one GTX for DP... but are there software/driver changes I need to make as well?  I'm happy to share my results if anyone can point me in the right direction.

RE: DisplayPort on PCIe carrier card?

Hi steven.bell,

The best answer that I can offer is that you should start by editing your hardware design in Vivado and change the USB3/DisplayPort settings as needed in the MPSoC IP Configuration screen and then build/export to PetaLinux. The changes will get picked up automatically when you import the new hardware platform.

Also, keep in mind that only one GTR lane goes to DiplayPort on the PCIe Carrier (the other goes to the PCIe edge connector) so the supported resolution is lower.

Best Regards,


A quick diff of the preset

A quick diff of the preset files shows that the only difference (in terms of PS8 configuration) between the boards is the GTR allocation and GTR clocks.  I made these changes and rebuilt the design.   I also removed the latter of the two phys in the device tree configuration block for the DP (so I have "phys = <&lane3 PHY_TYPE_DP 0 3 27000000>") .  After rebuilding everything and booting it up, the device tree appears to have been updated (I can probe it via /proc/device-tree), but I still don't get anything on my monitor, and the USB still doesn't work.
How much lower is the supported resolution with only one lane?  I was hoping one lane would still be enough for 1080p... but when I try to view the supported modes, it only goes up to 1024x768:

root@uz3eg-iocc-dp-2017-2:/sys/class/drm/card0/card0-DP-1# cat modes

When I run the "out of the box" tricube demo, I get the full resolution the monitor is capable of:

root@uz3eg-iocc-dp-2017-2:~# cat /sys/class/drm/card0-DP-1/modes
Is there a way to check what framerate and what GTR clock rate it's trying to run at?

Got it working!  I had missed

Got it working!  I had missed the fact that the input clock is on a different SOM pin between the IOCC and PCIeCC.  So I updated my constraints file (in addition to the PS8 configuration changes and devicetree edits above) and it works at 1024x768.  That'll do for now until I can build a custom carrier card with two DP lanes and an FMC. :-)

# This is for the IO carrier card
# Clock is routed through SOM JX1_HP_DP_36_GC
#set_property PACKAGE_PIN N3 [get_ports {idt5901_clk_n}]
#set_property PACKAGE_PIN N4 [get_ports {idt5901_clk_p}]

# This is for the PCIe carrier card
# Clock is routed through SOM JX2_HP_DP_11_GC
set_property PACKAGE_PIN E5 [get_ports {idt5901_clk_n}]
set_property PACKAGE_PIN E6 [get_ports {idt5901_clk_p}]‘
USB still doesn't work, but that's a problem for another thread...