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Error building U96_avnet Matrix Multiply Project

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Error building U96_avnet Matrix Multiply Project

I am following one of the reference tutorials
(Tools 2018.2, Training Version v3, 18 Aug 2018)
This is in Lab 1, Experiment 2 Creating the Matrix Multiply Project for u96_avnet. I am following this to the letter except for choosing the u96_avnet platform instead of the mz_avnet platform. I get the errors below. Could this be an issue in the harware platform from avnet or the Xilinx Matrix Multiply template, or the SDSoC tool (2018.2)?
Any clue? Errors below (either Debug or Release, same results). Thanks!

C:\Users\MDouglas\workspace3\U96MM\Release>exit /b 0 

INFO: [PragmaGen 83-3231] Successfully generated tcl script: C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel.tcl

Moving function mmult_accel to Programmable Logic

ERROR: [SdsCompiler 83-5031] Problem detected in Vivado HLS run - unable to find solution implementation directory for mmult_accel C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel/solution/impl/ip. For possible causes, review C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel/solution/solution.log or C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel_vivado_hls.log.

C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel_vivado_hls.log (last 20 lines):

INFO: [HLS 200-10] Creating and opening project 'C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel'.

INFO: [HLS 200-10] Adding design file 'C:/Users/MDouglas/workspace3/U96MM/src/mmult.cpp' to the project

INFO: [HLS 200-10] Creating and opening solution 'C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel/solution'.

INFO: [HLS 200-10] Cleaning up the solution database.

INFO: [HLS 200-10] Setting target device to ' xczu3eg-sbva484-1-e '

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Users/MDouglas/workspace3/U96MM/src/mmult.cpp' ... 

invalid command name "log_puts_err"

    while executing

"source C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel_run.tcl"

    invoked from within

"hls::main C:/Users/MDouglas/workspace3/U96MM/Release/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log"

    ("uplevel" body line 1)

    invoked from within

"uplevel 1 hls::main {*}$args"

    (procedure "hls_proc" line 5)

    invoked from within

"hls_proc $argv"

INFO: [Common 17-206] Exiting vivado_hls at Thu Sep 13 14:01:15 2018...

sds++ log file saved as C:/Users/MDouglas/workspace3/U96MM/Release/_sds/reports/sds_mmult.log

ERROR: [SdsCompiler 83-5004] Build failed

 

make: *** [src/mmult.o] Error 1

 

14:05:13 Build Finished (took 4m:49s.180ms)

JFoster
Moderator(71)
Hi,

Hi,

So you trying the Ultra96 sdsoc design on a MicroZed? I would think that is your issue. The two platforms are significantly different.

-Jodh

No, that would be silly. I am

No, that would be silly. I am trying the ultra96 design on an ultra96. The tutorial uses microZed as an example, I am following the instructions, except that I am using the u96_avnet platform instead of the mz_avnet platform. 
And I haven't even gotten anywhere near hardware yet. I should be able to build for microZed as well (but I wouldn't be able to do anything with the build)
Thanks,
marion

JFoster
Moderator(71)
Hi Marion,

Hi Marion,

 

Thanks for clarifying, I now see what you mean. Do you have your Ultra96 SDSoC License installed? Please verify in the license manager

Do you also have the board definition files installed ( Referencing the Experiment setup)

-Josh

 

Hi Josh,

Hi Josh,
 
I do have the board definition files installed (as in the experiment setup). 
I am a little bit overwhelmed with the many licenses.
I have (from the on-line Product Licensing page):
SDSoC Environment 60-day eval license (expires 01 Oct 2018)
OEM Zynq Ultra96 Vivado Design Edition with SDSoC Voucher Pack (expires 02 Aug 2019) (is this the one you mean???)
and in Vivado License Manager a plethora of certificate based licenses. These are either permanent or expire 01-oct-2018, 31-oct-2018, 02-aug 2019. One, named VIVADO_HLS, expired 01-sep-2018.
Interesting that the error I get would be so cryptic if this is due to a licensing issue (rather than just saying "your so-and-so license expired")
Thanks for your help,
 
marion

I managed to get another

I managed to get another VIVADO_HLS license, but so far get the same results. I'll try to clean and start from scratch and rebuild.
 
Thanks,
 
marion

fletch
Moderator(23)
Marion,

Marion,

  Were you able to get this working? I know there is a bug in SDSoC where the ACP is not an allowed resource. Once it is removed, then it will work. 

We have instructions posted now at http://ultra96.org/support/design/24166/156 

Ultra96 SDSoC Platform for v2018.2 (baremetal with Xilinx Matrix Multiple Example updated for Ultra96v1 BDF)

 

Bryan

Hi Byan,

Hi Byan,
 
Thanks for your reply. I just tried it. What is the ACP? I downloaded al the new stuff and re-ran froim scratch.
 
Unfortunately, still the same issue:
 
...

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Avnet/SDx_workspace2/U96V1MM/src/mmult.cpp' ... 

invalid command name "log_puts_err"

    while executing

"source C:/Avnet/SDx_workspace2/U96V1MM/Debug/_sds/vhls/mmult_accel_run.tcl"

    invoked from within

"hls::main C:/Avnet/SDx_workspace2/U96V1MM/Debug/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log"

    ("uplevel" body line 1)

    invoked from within

"uplevel 1 hls::main {*}$args"

    (procedure "hls_proc" line 5)

    invoked from within

"hls_proc $argv"

INFO: [Common 17-206] Exiting vivado_hls at Fri Oct 26 13:58:46 2018...

sds++ log file saved as C:/Avnet/SDx_workspace2/U96V1MM/Debug/_sds/reports/sds_mmult.log

ERROR: [SdsCompiler 83-5004] Build failed

 

make: *** [src/mmult.o] Error 1

 

14:02:41 Build Finished (took 4m:51s.430ms)

zedman2000
Moderator(10)
Hi Marion,

Hi Marion,

As Bryan mentioned above, there is an AR on the ACP issue.  If you are using the provided platform, you should have a platform that already includes the work around for this.

Here is the link for anyone that is interested: https://www.xilinx.com/support/answers/71651.html

I'd like you to try a few troubleshooting steps with me.
First what does the \Avnet\Platforms folder look like?
Here is mine:

MiniZed, Ultra96v1, UltraZed-EV

Were you able to go through the log files from the first post?  The error messages indicate that there was more information in those - and I do suggest going through those logs as they usually tell you exactly where things went sideways.

Next, can we try to remove the hardware acceleration?

Open up SDSoC.  Then in the project right click the hardware function, and remove it. 

Clean and Rebuild and see if that completes. 

This removes the HLS portion so the things you mentioned above that were causling issues - should not.  If this completes, then we really need to see what is listed in those logs as the cause of the issue, but from what you posted it appears that the HLS did not get generated (the mention that there are missing files).

 

Hi zedman,

Hi zedman,
I grabbed the platform that works around the AR on ACP issue (always like to know what acronyms AR and ACP in this contect stand for). My platform folder looks the same as yours.
I built and had the same issue as before. So I removed the hardware function and did a clean and rebuild. This revealed another issue that has to do with renaming ultra96 to ultra96v1 in the platform in several locations (I don't know howmany matter so I changed them all - I do know at least two locations matter board.xml and rebuild .tcl in the .dsa archive)
The issue gives an error as follows ERROR: [VPL 49-71] The board_part definition was not found for em.avnet.com:ultra96v1:part0:1.2. If you run the TCL script get_board_parts, em.avnet.com:ultra96v1:part0:1.2 is not one of the choices, but em.avnet.com:ultra96:part0:1.2 is.
This fix gets me through the build without the hardware function.
Added the hardware function back in clean and rebuild. Still get the same error. 
We are ultimately planning to use SDSoC on Linux, so I tried this with the fixed platform (after renaming ultra96v1 to ultra96) on my Linux installation, and it worked fine there. Perhaps I have a bad windows installation?
Thanks for your help!
FWIW, the log file contents (3 log files) below:

solution.log

==============================================================

File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC

Version: 2018.2

Copyright (C) 1986-2018 Xilinx, Inc. All Rights Reserved.

 

==============================================================

 

INFO: [HLS 200-10] Setting target device to ' xczu3eg-sbva484-1-e '

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' ... 

INFO: [Common 17-206] Exiting vivado_hls at Mon Oct 29 16:21:24 2018...

******************************************************************************************************************************************

 

mmult_accel_vivado_hls.log

****** Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC v2018.2 (64-bit)

  **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018

  **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018

    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

 

source C:/Xilinx/Vivado/2018.2/scripts/vivado_hls/hls.tcl -notrace

INFO: [HLS 200-10] Running 'C:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/vivado_hls.exe'

INFO: [HLS 200-10] For user 'mdouglas' on host 'dxuus-nb006229' (Windows NT_amd64 version 6.2) on Mon Oct 29 16:21:05 -0700 2018

INFO: [HLS 200-10] In directory 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls'

INFO: [HLS 200-10] Creating and opening project 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel'.

INFO: [HLS 200-10] Adding design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' to the project

INFO: [HLS 200-10] Creating and opening solution 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel/solution'.

INFO: [HLS 200-10] Cleaning up the solution database.

INFO: [HLS 200-10] Setting target device to ' xczu3eg-sbva484-1-e '

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' ... 

invalid command name "log_puts_err"

    while executing

"source C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl"

    invoked from within

"hls::main C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log"

    ("uplevel" body line 1)

    invoked from within

"uplevel 1 hls::main {*}$args"

    (procedure "hls_proc" line 5)

    invoked from within

"hls_proc $argv"

INFO: [Common 17-206] Exiting vivado_hls at Mon Oct 29 16:21:24 2018...

*********************************************************************************************************************************************

 

sds_mmult.log

(c) Copyright 2012-2018 Xilinx, Inc. All Rights Reserved.

#-----------------------------------------------------------

# Tool version  : sds++ 2018.2 SW Build 2258646 on Thu Jun 14 20:04:27 MDT 2018

# Start time    : Mon Oct 29 16:20:42 -0700 2018

# Command line  : sds++ -Wall -O0 -g -I../src -c -fmessage-length=0 -MTsrc/mmult.o -MMD -MP -MFsrc/mmult.d -MTsrc/mmult.o -o src/mmult.o ../src/mmult.cpp -sds-hw mmult_accel mmult.cpp -clkid 0 -sds-end -sds-sys-config u96v1_avnet -sds-proc standalone -sds-pf {C:\Avnet\platforms\Platforms\u96v1_avnet}

# Log file      : C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/reports/sds_mmult.log

# Journal file  : C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/reports/sds_mmult.jou

# Report file   : C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/reports/sds_mmult.rpt

#-----------------------------------------------------------

 

Create data motion intermediate representation

C:/Xilinx/SDx/2018.2/bin/clang_wrapper -I../src -Wall -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL     -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include  -D HLS_NO_XIL_FPO_LIB  -I C:/Xilinx/Vivado/2018.2/include   -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include  -std=c++11 -emit-llvm -S C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp -o C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/.llvm/src/mmult.s

 

C:\Avnet\FixMMultWorkspace\hackster_example\Debug>C:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -I../src -Wall -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2018.2/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include -std=c++11 -emit-llvm -S C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp -o C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/.llvm/src/mmult.s 

 

C:\Avnet\FixMMultWorkspace\hackster_example\Debug>exit /b 0 

Performing accelerator source linting for mmult_accel

C:/Xilinx/SDx/2018.2/bin/sdslint -target cortex-a53 -func "mmult_accel" C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp -- -c -I../src -Wall -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL -w    -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include  -D HLS_NO_XIL_FPO_LIB  -I C:/Xilinx/Vivado/2018.2/include   -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include  -std=c++11

aarch64-none-elf-g++ -c C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/swstubs/mmult.cpp -o C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/swstubs/mmult.o

aarch64-none-elf-objcopy --add-section .xdinfo=C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/swstubs/mmult.o.xml C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/swstubs/mmult.o

Performing pragma generation

C:/Xilinx/SDx/2018.2/bin/clang_wrapper -E -IC:/Avnet/FixMMultWorkspace/hackster_example/src -Wall -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -m64 -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include -IC:/Avnet/FixMMultWorkspace/hackster_example/src -D __SDSVHLS__ -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL -w    -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include  -D HLS_NO_XIL_FPO_LIB  -I C:/Xilinx/Vivado/2018.2/include   -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include  -std=c++11 C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp -o C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_pp.cpp

 

C:\Avnet\FixMMultWorkspace\hackster_example\Debug>C:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -E -IC:/Avnet/FixMMultWorkspace/hackster_example/src -Wall -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -m64 -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include -IC:/Avnet/FixMMultWorkspace/hackster_example/src -D __SDSVHLS__ -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL -w -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2018.2/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include -std=c++11 C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp -o C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_pp.cpp 

 

C:\Avnet\FixMMultWorkspace\hackster_example\Debug>exit /b 0 

C:/Xilinx/SDx/2018.2/bin/pragma_gen  -func "mmult_accel"   -tcl C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel.tcl   C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_pp.cpp -multi_aximm   --  -c  -D __SDSVHLS__ -IC:/Avnet/FixMMultWorkspace/hackster_example/src -Wall -O0 -g -fmessage-length=0 -MMD -MP -D __SDSCC__ -m64    -D HLS_NO_XIL_FPO_LIB  -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include -IC:/Avnet/FixMMultWorkspace/hackster_example/src  -target aarch64-none-elf -mcpu=cortex-a53 -O0 -g -D_GLIBCXX_USE_C99_MATH_TR1 -D_LDBL_EQ_DBL -w    -I C:/Xilinx/SDx/2018.2/target/aarch64-none/include  -D HLS_NO_XIL_FPO_LIB  -I C:/Xilinx/Vivado/2018.2/include   -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1 -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/aarch64-none-elf -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include/c++/7.2.1/backward -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/lib/gcc/aarch64-none-elf/7.2.1/include-fixed -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/include -IC:/Xilinx/SDK/2018.2/gnu/aarch64/nt/aarch64-none/aarch64-none-elf/libc/usr/include  -std=c++11

INFO: [PragmaGen 83-3231] Successfully generated tcl script: C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel.tcl

Moving function mmult_accel to Programmable Logic

C:/Xilinx/Vivado/2018.2/bin/vivado_hls C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log

 

****** Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC v2018.2 (64-bit)

  **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018

  **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018

    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

 

source C:/Xilinx/Vivado/2018.2/scripts/vivado_hls/hls.tcl -notrace

INFO: [HLS 200-10] Running 'C:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/vivado_hls.exe'

INFO: [HLS 200-10] For user 'mdouglas' on host 'dxuus-nb006229' (Windows NT_amd64 version 6.2) on Mon Oct 29 16:21:05 -0700 2018

INFO: [HLS 200-10] In directory 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls'

INFO: [HLS 200-10] Creating and opening project 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel'.

INFO: [HLS 200-10] Adding design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' to the project

INFO: [HLS 200-10] Creating and opening solution 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel/solution'.

INFO: [HLS 200-10] Cleaning up the solution database.

INFO: [HLS 200-10] Setting target device to ' xczu3eg-sbva484-1-e '

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' ... 

invalid command name "log_puts_err"

    while executing

"source C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl"

    invoked from within

"hls::main C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log"

    ("uplevel" body line 1)

    invoked from within

"uplevel 1 hls::main {*}$args"

    (procedure "hls_proc" line 5)

    invoked from within

"hls_proc $argv"

INFO: [Common 17-206] Exiting vivado_hls at Mon Oct 29 16:21:24 2018...

ERROR: [SdsCompiler 83-5031] Problem detected in Vivado HLS run - unable to find solution implementation directory for mmult_accel C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel/solution/impl/ip. For possible causes, review C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel/solution/solution.log or C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_vivado_hls.log.

C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_vivado_hls.log (last 20 lines):

C:/Xilinx/SDK/2018.2/gnuwin/bin/tail.exe -20 C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_vivado_hls.log

INFO: [HLS 200-10] Creating and opening project 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel'.

INFO: [HLS 200-10] Adding design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' to the project

INFO: [HLS 200-10] Creating and opening solution 'C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel/solution'.

INFO: [HLS 200-10] Cleaning up the solution database.

INFO: [HLS 200-10] Setting target device to ' xczu3eg-sbva484-1-e '

INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns.

INFO: [SYN 201-201] Setting up clock 'default' with an uncertainty of 2.7ns.

INFO: [HLS 200-10] Analyzing design file 'C:/Avnet/FixMMultWorkspace/hackster_example/src/mmult.cpp' ... 

invalid command name "log_puts_err"

    while executing

"source C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl"

    invoked from within

"hls::main C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/vhls/mmult_accel_run.tcl -l mmult_accel_vivado_hls.log"

    ("uplevel" body line 1)

    invoked from within

"uplevel 1 hls::main {*}$args"

    (procedure "hls_proc" line 5)

    invoked from within

"hls_proc $argv"

INFO: [Common 17-206] Exiting vivado_hls at Mon Oct 29 16:21:24 2018...

sds++ log file saved as C:/Avnet/FixMMultWorkspace/hackster_example/Debug/_sds/reports/sds_mmult.log

ERROR: [SdsCompiler 83-5004] Build failed

sds++ completed at Mon Oct 29 16:25:23 -0700 2018

 

Additional info

I installed the SDK tools on a new windows 10 enterprise machine, thinking my previous windows installtion was somehow corrupt. Same error. Seems like there is something else I need to do when installing on Windows. Linux works, Windows does not. Hopefully this is a useful data point. Thanks, everyone, for all your help; I appreciate you!

zedman2000
Moderator(10)
Marion,

Marion,

ACP is the Accelerator Coherency Port. It is used as a large data pipe between the PL (programmable Logic) and PS (Programming System).
AR is Xilinx's term for Answer Record. Usually used to discuss workarounds.

Ok, maybe we can solve this quick. Which version of the documentation are you working on? We recently had to rename the Ultra96 to a V1 variant.

This breaks all the older stuff. You have to use all the newer pieces from the new archive. This is posted now as you noticed.

This means, you will likely need to use all the new files. Yes, the older DSA cannot be used with the newer project without modifications as that DSA only understands Ultra96, not Ultra96V1.

Secondly, at least based on the above logs, it seems that something else is going on as "invalid command name "log_puts_err"" is causing the HLS to never build.

Are you using Windows or Linux?
Under Windows, there is a character limit for how many letters can be in your path name.
C:/Avnet/FixMMultWorkspace/hackster_example/
is likely too long.
You will probably have to shorten that to something like:
C:/Avnet/SDxWorkspace/hack_ex/
--Think Windows 8.3 name formatting for SDSoC under Windows.

See AR 52787
https://www.xilinx.com/support/answers/52787.html

--Dan

Thanks, Dan,

Thanks, Dan,
New data. I've been suspecting some configuration issue on my machines at work (laptop and desktop) Both  of these get the error when using Windows installation of SDSoC.
So I tried it on my home PC. Works fine. Interestingly, the antivirus software on my home PC (Windows Defender) warns me about something (I should have taken the time to read it exactly, but eclipse was mentioned) I bypassed it, and everything worked OK. We have different antivirus software (Sophos) at work, and it is configured so as not to let us bypass or even see logs. Maybe there is something that antivirus software may see as insecure, causing it to prevent some script from running. But that is just speculation for now
Not very satisfying, as I don't know what the root cause is. Work machines are running Windows 10 enterprise; at home I run Windows 10 Pro.I plan to raise this issue to IT, so perhaps they can figure out what is going on. When I find out, I will be sure to let others know.
Thanks everyone for all your help,
Marion

zedman2000
Moderator(10)
Marion,

Marion,

Sounds good. Yes, even during the install you are directed to disable virus scanning. I've seen this in the past, but it has been a while.

--Dan