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Ethernet and DTS

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suppamax's picture
suppamax
Junior(0)
Ethernet and DTS

Hi,

I'm back here because I still have problems in setting up an ethernet connection in microzed.

I did several tests:

1) image provided in QSPI: no issue
2) my boot.ini in SD + linux boot from tftp (I use this release http://www.wiki.xilinx.com/Zynq+2014.4+Release): linux boots, I can configure eth0, I can ping the localhost but I cannot ping the laptop
3) same as above, but I converted the dtb to dtc and then back again to dtb: I cannot configure eth0 any more!!! (no phy found)
4) like 2 but using Kevin's dts (see http://zedboard.org/content/device-tree-generation-0): no phy found

I seems to me that the dtc converter does something wrong: how is it possible?
Any idea?
Is there a way to extract the files loaded in QSPI?

I copy the dts generated at point 3 here:

/dts-v1/;

/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
model = "Zynq Zed Development Board";

chosen {
bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
linux,stdout-path = "/amba/serial@e0001000";
};

aliases {
ethernet0 = "/amba/ethernet@e000b000";
serial0 = "/amba/serial@e0001000";
spi0 = "/amba/spi@e000d000";
};

memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};

cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;

cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
clocks = <0x1 0x3>;
clock-latency = <0x3e8>;
cpu0-supply = <0x2>;
operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
};

cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x1>;
clocks = <0x1 0x3>;
};
};

pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
interrupt-parent = <0x3>;
reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
};

fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "VCCPINT";
regulator-min-microvolt = <0xf4240>;
regulator-max-microvolt = <0xf4240>;
regulator-boot-on;
regulator-always-on;
linux,phandle = <0x2>;
phandle = <0x2>;
};

amba {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <0x3>;
ranges;

adc@f8007100 {
compatible = "xlnx,zynq-xadc-1.00.a";
reg = <0xf8007100 0x20>;
interrupts = <0x0 0x7 0x4>;
interrupt-parent = <0x3>;
clocks = <0x1 0xc>;
};

can@e0008000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clocks = <0x1 0x13 0x1 0x24>;
clock-names = "can_clk", "pclk";
reg = <0xe0008000 0x1000>;
interrupts = <0x0 0x1c 0x4>;
interrupt-parent = <0x3>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
};

can@e0009000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clocks = <0x1 0x14 0x1 0x25>;
clock-names = "can_clk", "pclk";
reg = <0xe0009000 0x1000>;
interrupts = <0x0 0x33 0x4>;
interrupt-parent = <0x3>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
};

gpio@e000a000 {
compatible = "xlnx,zynq-gpio-1.0";
#gpio-cells = <0x2>;
clocks = <0x1 0x2a>;
gpio-controller;
interrupt-parent = <0x3>;
interrupts = <0x0 0x14 0x4>;
reg = <0xe000a000 0x1000>;
};

i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <0x1 0x26>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x19 0x4>;
reg = <0xe0004000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};

i2c@e0005000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <0x1 0x27>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x30 0x4>;
reg = <0xe0005000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};

interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x3>;
interrupt-controller;
reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
linux,phandle = <0x3>;
phandle = <0x3>;
};

cache-controller@f8f02000 {
compatible = "arm,pl310-cache";
reg = <0xf8f02000 0x1000>;
arm,data-latency = <0x3 0x2 0x2>;
arm,tag-latency = <0x2 0x2 0x2>;
cache-unified;
cache-level = <0x2>;
};

memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-1.0";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
};

ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <0x3>;
interrupts = <0x0 0x3 0x4>;
reg = <0xf800c000 0x1000>;
};

serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
clocks = <0x1 0x17 0x1 0x28>;
clock-names = "uart_clk", "pclk";
reg = <0xe0000000 0x1000>;
interrupts = <0x0 0x1b 0x4>;
};

serial@e0001000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "okay";
clocks = <0x1 0x18 0x1 0x29>;
clock-names = "uart_clk", "pclk";
reg = <0xe0001000 0x1000>;
interrupts = <0x0 0x32 0x4>;
};

spi@e0006000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0006000 0x1000>;
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x1a 0x4>;
clocks = <0x1 0x19 0x1 0x22>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
};

spi@e0007000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0007000 0x1000>;
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x31 0x4>;
clocks = <0x1 0x1a 0x1 0x23>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
};

spi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <0x1 0xa 0x1 0x2b>;
compatible = "xlnx,zynq-qspi-1.0";
status = "okay";
interrupt-parent = <0x3>;
interrupts = <0x0 0x13 0x4>;
reg = <0xe000d000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
is-dual = <0x0>;
num-cs = <0x1>;

flash@0 {
compatible = "n25q128a11";
reg = <0x0>;
spi-tx-bus-width = <0x1>;
spi-rx-bus-width = <0x4>;
spi-max-frequency = <0x2faf080>;
#address-cells = <0x1>;
#size-cells = <0x1>;

partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};

partition@qspi-linux {
label = "qspi-linux";
reg = <0x100000 0x500000>;
};

partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};

partition@qspi-rootfs {
label = "qspi-rootfs";
reg = <0x620000 0x5e0000>;
};

partition@qspi-bitstream {
label = "qspi-bitstream";
reg = <0xc00000 0x400000>;
};
};
};

memory-controller@e000e000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
status = "disabled";
clock-names = "memclk", "aclk";
clocks = <0x1 0xb 0x1 0x2c>;
compatible = "arm,pl353-smc-r2p1";
interrupt-parent = <0x3>;
interrupts = <0x0 0x12 0x4>;
ranges;
reg = <0xe000e000 0x1000>;

flash@e1000000 {
status = "disabled";
compatible = "arm,pl353-nand-r2p1";
reg = <0xe1000000 0x1000000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
};

flash@e2000000 {
status = "disabled";
compatible = "cfi-flash";
reg = <0xe2000000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
};
};

ethernet@e000b000 {
compatible = "xlnx,ps7-ethernet-1.00.a";
reg = <0xe000b000 0x1000>;
status = "okay";
interrupts = <0x0 0x16 0x4>;
clocks = <0x1 0xd 0x1 0x1e>;
clock-names = "ref_clk", "aper_clk";
local-mac-address = [00 0a 35 00 00 00];
xlnx,has-mdio = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
phy-mode = "rgmii-id";
phy-handle = <0x4>;

phy@0 {
reg = <0xe000b000 0x1000>;
marvel,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
linux,phandle = <0x4>;
phandle = <0x4>;
/*
reg = <0x0>;
linux,phandle = <0x4>;
phandle = <0x4>;
*/
};
};

ethernet@e000c000 {
compatible = "xlnx,ps7-ethernet-1.00.a";
reg = <0xe000c000 0x1000>;
status = "disabled";
interrupts = <0x0 0x2d 0x4>;
clocks = <0x1 0xe 0x1 0x1f>;
clock-names = "ref_clk", "aper_clk";
local-mac-address = [00 0a 35 00 00 00];
xlnx,has-mdio = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};

sdhci@e0100000 {
compatible = "arasan,sdhci-8.9a";
status = "okay";
clock-names = "clk_xin", "clk_ahb";
clocks = <0x1 0x15 0x1 0x20>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x18 0x4>;
reg = <0xe0100000 0x1000>;
};

sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
clocks = <0x1 0x16 0x1 0x21>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x2f 0x4>;
reg = <0xe0101000 0x1000>;
};

slcr@f8000000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-slcr", "syscon";
reg = <0xf8000000 0x1000>;
ranges;

clkc@100 {
#clock-cells = <0x1>;
compatible = "xlnx,ps7-clkc";
ps-clk-frequency = <0x1fca055>;
fclk-enable = <0xf>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
reg = <0x100 0x100>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
};

dmac@f8003000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xf8003000 0x1000>;
interrupt-parent = <0x3>;
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
#dma-cells = <0x1>;
#dma-channels = <0x8>;
#dma-requests = <0x4>;
clocks = <0x1 0x1b>;
clock-names = "apb_pclk";
};

devcfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <0x1 0xc 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <0x3>;
interrupts = <0x0 0x8 0x4>;
reg = <0xf8007000 0x100>;
};

timer@f8f00200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xf8f00200 0x20>;
interrupts = <0x1 0xb 0x301>;
interrupt-parent = <0x3>;
clocks = <0x1 0x4>;
};

timer@f8001000 {
interrupt-parent = <0x3>;
interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8001000 0x1000>;
};

timer@f8002000 {
interrupt-parent = <0x3>;
interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8002000 0x1000>;
};

timer@f8f00600 {
interrupt-parent = <0x3>;
interrupts = <0x1 0xd 0x301>;
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf8f00600 0x20>;
clocks = <0x1 0x4>;
};

watchdog@f8005000 {
clocks = <0x1 0x2d>;
compatible = "xlnx,zynq-wdt-r1p2";
device_type = "watchdog";
interrupt-parent = <0x3>;
interrupts = <0x0 0x9 0x1>;
reg = <0xf8005000 0x1000>;
reset = <0x0>;
timeout-sec = <0xa>;
};

usb@e0002000 {
clocks = <0x1 0x1c>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
status = "okay";
interrupt-parent = <0x3>;
interrupts = <0x0 0x15 0x4>;
reg = <0xe0002000 0x1000>;
dr_mode = "host";
phy_type = "ulpi";
};

usb@e0003000 {
clocks = <0x1 0x1d>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x2c 0x4>;
reg = <0xe0003000 0x1000>;
};
};
};

zedhed's picture
zedhed
Moderator(25)
RE: Ethernet and DTS

Hi Max,
 
I am not sure how the DTC could be creating a bad DTB from a good DTS.
 
Where does the DTS you posted above come from?  Although C style comments are supposed to be supported, seeing them within the ethernet entry leads me to be think that this is a hand edited version of DTS and not one directly from the Xilinx 2014.4 release.
 
ethernet@e000b000 {
   compatible = "xlnx,ps7-ethernet-1.00.a";
   reg = <0xe000b000 0x1000>;
   status = "okay";
   interrupts = <0x0 0x16 0x4>;
   clocks = <0x1 0xd 0x1 0x1e>;
   clock-names = "ref_clk", "aper_clk";
   local-mac-address = [00 0a 35 00 00 00];
   xlnx,has-mdio = <0x1>;
   #address-cells = <0x1>;
   #size-cells = <0x0>;
   phy-mode = "rgmii-id";
   phy-handle = <0x4>;
   phy@0 {
      reg = <0xe000b000 0x1000>;
      marvel,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
      linux,phandle = <0x4>;
      phandle = <0x4>;
      /*
      reg = <0x0>;
      linux,phandle = <0x4>;
      phandle = <0x4>;
      */

   };
};
 
Have you tried starting with the ZedBoard DTB file from the Xilinx 2014.4 release you pointed to?  Starting from that point and making small incremental changes towards matching your MicroZed 7020 hardware might be one way of narrowing down this problem.
 
Regards,
 
-Kevin

suppamax's picture
suppamax
Junior(0)
Hi Kevin,

Hi Kevin,

the posted dts is the one generated from the zedboard's dtb for 2014.4 release.
I manually modified it because I had the impression that the conversion dtb->dts->dtb was not working.
But I think I messed things up, because I tried again and I see the same behaviour as with the original dtb.

Which is good because it means that I have a working dts, but it also means that I still cannot use the ethernet.
zynq> ifconfig lo up
zynq> ifconfig eth0 down
zynq> ifconfig eth0 up
zynq> ifconfig
eth0 Link encap:Ethernet HWaddr 00:0A:35:00:01:22
inet addr:10.10.70.102 Bcast:10.10.70.255 Mask:255.255.255.0
UP BROADCAST MULTICAST MTU:1500 Metric:1
RX packets:59 errors:0 dropped:0 overruns:0 frame:0
TX packets:30 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:8899 (8.6 KiB) TX bytes:1260 (1.2 KiB)
Interrupt:54 Base address:0xb000

lo Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
UP LOOPBACK RUNNING MTU:65536 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:0
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)

zynq> xemacps e000b000.ethernet: Set clk to 113333333 Hz
xemacps e000b000.ethernet: link up (1000/FULL)

zynq> ping 10.10.70.102
PING 10.10.70.102 (10.10.70.102): 56 data bytes
64 bytes from 10.10.70.102: seq=0 ttl=64 time=0.154 ms
64 bytes from 10.10.70.102: seq=1 ttl=64 time=0.097 ms
64 bytes from 10.10.70.102: seq=2 ttl=64 time=0.078 ms
64 bytes from 10.10.70.102: seq=3 ttl=64 time=0.084 ms
64 bytes from 10.10.70.102: seq=4 ttl=64 time=0.073 ms
64 bytes from 10.10.70.102: seq=5 ttl=64 time=0.115 ms
64 bytes from 10.10.70.102: seq=6 ttl=64 time=0.075 ms
64 bytes from 10.10.70.102: seq=7 ttl=64 time=0.077 ms
^C
--- 10.10.70.102 ping statistics ---
8 packets transmitted, 8 packets received, 0% packet loss
round-trip min/avg/max = 0.073/0.094/0.154 ms
zynq> ping 10.10.70.101
PING 10.10.70.101 (10.10.70.101): 56 data bytes
^C
--- 10.10.70.101 ping statistics ---
8 packets transmitted, 0 packets received, 100% packet loss

10.10.70.101 is the address of the host.