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FMC-IMAGEON Building a video design from scratch tutorial - add a video frame buffer

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pcaddick's picture
pcaddick
Junior(11)
FMC-IMAGEON Building a video design from scratch tutorial - add a video frame buffer

Hi I am using the Avnet FMC-IMAGEON Building a video design from scratch tutorial - add a video frame buffer to create a design that is using the VDMA. This tutorial uses Plan Ahead (so that is what I've done). I have implemented the design exactly as it says and unfortunately it doesn't work. In the SDK terminal window I get the following:

------------------------------------------------------
-- FMC-IMAGEON HDMI Video Frame Buffer --
------------------------------------------------------

FMC-IMAGEON Initialization ...
HDMI Input Initialization ...
Video Clock Synthesizer Configuration ...
Enabling spread-spectrum clocking (SSC)
type=down-spread, amount=-0.75%
HDMI Output Initialization ...
Video DMA (Output Side) Initialization ...
Video Timing Controller (generator) Initialization ...
Video Resolution = 1080P
Waiting for ADV7611 to locked on incoming video ...
ADV7611 Video Input LOCKED
ADV7611 Video Input Information
Video Input = HDMI, Progressive
Color Depth = 8 bits per channel
HSYNC Timing = hav=1920, hfp=528, hsw=44(hsp=1), hbp=148
VSYNC Timing = vav=1080, vfp=04, vsw=05(vsp=1), vbp=036
Video Dimensions = 1920 x 1080
Video DMA (Input Side) Initialization ...
HDMI Output Re-Initialization ...
AXI_VDMA - Partial Register Dump (uBaseAddr = 0x43000000):
PARKPTR = 0x001F0000
----------------
S2MM_DMACR = 0x00010042
S2MM_DMASR = 0x00014831
S2MM_STRD_FRMDLY = 0x00000F00
S2MM_START_ADDR0 = 0x00000000
S2MM_START_ADDR1 = 0x00000000
S2MM_START_ADDR2 = 0x00000000
S2MM_HSIZE = 0x00000F00
S2MM_VSIZE = 0x00000438
----------------
MM2S_DMACR = 0x0001018A
MM2S_DMASR = 0x00014021
MM2S_STRD_FRMDLY = 0x00000F00
MM2S_START_ADDR0 = 0x00000000
MM2S_START_ADDR1 = 0x00000000
MM2S_START_ADDR2 = 0x00000000
MM2S_HSIZE = 0x00000F00
MM2S_VSIZE = 0x00000438
----------------
S2MM_HSIZE_STATUS= 0x00000000
S2MM_VSIZE_STATUS= 0x00000000
----------------
AXI_VDMA - Checking Error Flags
S2MM_DMASR - ErrIrq
S2MM_DMASR - SOFLateErr
S2MM_DMASR - DMASlvErr
S2MM_DMASR - DMAIntErr
MM2S_DMASR - ErrIrq
MM2S_DMASR - DMASlvErr
AXI_VDMA - Clearing Error Flags
AXI_VDMA - Partial Register Dump (uBaseAddr = 0x43000000):
PARKPTR = 0x001F0000
----------------
S2MM_DMACR = 0x00010042
S2MM_DMASR = 0x00010021
S2MM_STRD_FRMDLY = 0x00000F00
S2MM_START_ADDR0 = 0x00000000
S2MM_START_ADDR1 = 0x00000000
S2MM_START_ADDR2 = 0x00000000
S2MM_HSIZE = 0x00000F00
S2MM_VSIZE = 0x00000438
----------------
MM2S_DMACR = 0x0001018A
MM2S_DMASR = 0x00010021
MM2S_STRD_FRMDLY = 0x00000F00
MM2S_START_ADDR0 = 0x00000000
MM2S_START_ADDR1 = 0x00000000
MM2S_START_ADDR2 = 0x00000000
MM2S_HSIZE = 0x00000F00
MM2S_VSIZE = 0x00000438
----------------
S2MM_HSIZE_STATUS= 0x00000000
S2MM_VSIZE_STATUS= 0x00000000
----------------

Done

Press ENTER to re-start ...

As you can see from the debug registers I'm getting quite a few errors. What surprises me is that the start addresses are all zero. Can some one confirm if this should be the case please?

m.russell's picture
m.russell
Junior(0)
Hi,

Hi,

Does the tutorial come with a pre-built design, and can you run that to see if you get the same errors? If that runs then it's probably a configuration issue.

From the control register it looks like the example is only trying to read one frame, since it sets the IRQ on a frame count of 1, so the zero addresses might not be a problem. The most likely cause of your error is that the SOF (Start of Frame) is late, which in turn causes all your other errors. I've included a link to the VDMA product guide below in case you don't already have it:

http://www.xilinx.com/support/documentation/ip_documentation/axi_vdma/v6...

Matthew