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How to configure the SPI of Zedboard

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anissbelmajy's picture
anissbelmajy
Junior(1)
How to configure the SPI of Zedboard

Hi everybody!!
I just yet get started in the domain of designing hardware this my first experience. So my question is :

How can I configure the SPI to communicate with image sensor who is connecte to the zedboard card via connector FMC ??

Do you have any support or tutto in order to configure registers of the image sensors(in SDK) ?

I m working with vivado but i think i will switch to xilinx design suite.is it a good idea ?

Waiting for your feebacks.
Best regards

TroutChaser's picture
TroutChaser
Moderator(18)
Hello Anisse,

Hello Anisse,
 
To answer your last question first. Vivado is the current Xilinx tool suite for the Zynq device. You should stick with Vivado for the best performance and support. I would not recommend using the outdated ISE tools.
 
Assuming you want to control the FMC based image sensor with the Zynq ARM processor the easiest implementation would be to use either the Zynq PS (Processor System) SPI core or add a Quad_AXI SPI core to the PL (Programmable Logic). Either will work but I find the AXI SPI core to be more flexible. To use the PS SPI core you will need to configure the PS SPI signals to connect to the EMIO connections to the PL and then assign these signals to the appropriate Zynq IO pins connected to the FMC connector using a constraints file in Vivado. To use the AXI based SPI core you will need to add that to your block design along with an AXI controller and then make the necessary connections. You will use a constraints file to assign the external SPI signals to the IO pins connected to the FMC connector as you would for the PS SPI.
 
Depending on the image sensor FMC board you are using you may be able to find an example design already implemented. There are several for the ZedBoard listed on the ZedBoard Reference Designs page: http://zedboard.org/support/design/1521/11
 
I would also suggest that you work through some of the basic tutorial material available on implementing Zynq designs using Vivado.
 
The Avnet Zynq Speedways are a good place to start:
 
http://zedboard.org/course/developing-zynq%C2%AE-7000-all-programmable-s...
http://zedboard.org/course/developing-zynq%C2%AE-7000-all-programmable-s...
 
Adam Taylor has a series of blog posts on developing Zynq designs. He uses the MicroZed board but the basic design flow is the same:
 
http://zedboard.org/content/microzed-chronicles
 
And there is a lot of good material for the ZedBoard on the Xilinx University site if you are a student or educator:
 
http://www.xilinx.com/support/university.html
 
-Gary

anissbelmajy's picture
anissbelmajy
Junior(1)
Hello Edwards,

Hello Edwards,

I want to thank you a lot for your feedback.

Best regards

anissbelmajy's picture
anissbelmajy
Junior(1)
Constraints file

Hi Edwards,

I have done some tp on my laptop like "hello word" it was succesful although with FSBL on the SD-card.

I have read some of the support that you had sent me before.

now my question is very specific i want to know by what should I start for my project ? can i have your adresse mail in order to send you some screen-shoots. " i am trying to interface the Ps and PL by axi interconnect and bridge with vdma.
thank you for your feedback and help.

Anisse

TroutChaser's picture
TroutChaser
Moderator(18)
Hello Anisse,

Hello Anisse,
 
We are not in a position to provide individual support on the forum via email. The links provided above should give you a good understanding of how to interface the PS and PL using the AXI Interconnect. If you spend a little time searching for examples and applications notes you should be able to find some good examples on using vdma as well.
 
-Gary

anissbelmajy's picture
anissbelmajy
Junior(1)
Hi Edwards,

Hi Edwards,

I have connected my PS and PL via VDMA and VTC for timing (detection and generation)using build a video design from scratch ( part III add a frame buffer).
My image sensor outs put are 4 LVDS (each LVDS has two channel A and B).
what should i do to get my information data ??

thank you for your feedback,
-Anisse

TroutChaser's picture
TroutChaser
Moderator(18)
Hi Anisse,

Hi Anisse,
 
I am not sure exactly what you are asking. If it is how to move data from an image sensor into your application that would depend in part on what you are trying to accomplish.
 
In this case I would suggest that you look at one of the many video reference designs available for the ZedBoard as a starting point:
 
http://zedboard.org/support/design/1521/11
 
-Gary

anissbelmajy's picture
anissbelmajy
Junior(1)
Hi Edwards,

Hi Edwards,

thank you for your feedback.
The output of my image sensor is 4 LVDS(each LVDS has 2 channels).
My question is how can I de-serialize those channels to have a vector like(x downto 0).
there is an Ip core in vivado that may do this ??

ps : i need it for the input "vid_data[xx:0]" of my "Video In to Axi4-Stream".

kind regards
-Anisse

TroutChaser's picture
TroutChaser
Moderator(18)
Hello Anisse,

Hello Anisse,
 
There is dedicated logic in the FPGA portion of the Zynq device that can perform this function.
 
This Xilinx app note covers the basic operation:
 http://www.xilinx.com/support/documentation/application_notes/xapp585-lv...
 
The Display Panel Controller Standalone Tutorials for the MicroZed Embedded Vision Carrier on the MicroZed Embedded Vision Kit Reference Designs page has an example of de-serializing LVDS inputs:
http://picozed.org/support/design/4681/46
 
I suspect other reference designs on that page do as well.
 
-Gary