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How to handle signal processing with high speed ADC on Zedboard: PL or PS

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mzeeshanarshad's picture
mzeeshanarshad
Junior(0)
How to handle signal processing with high speed ADC on Zedboard: PL or PS

Hi,

I intend to use a 5MHz ADC connected through FMC of the Zedboard. I want to perform the following tasks with the data but I am confused about implementing it in PS or PL:

Calculate the minimum, maximum, range, standard deviation and z-score of the every n samples (selectable by user through PC) from the ADC.
Apply simple UCL, LCL algorithm on result of each calucation above and send result through ethernet to PC.
As I'm from software background, I'm just a newbie in FPGA and becuase its hard to deal with fixed/floating point number formats in PL, therefore I wan to implement this in PS.

Could you please advise me, is it possible to transfer data from 5MHz ADC straight to PS through AXI and then calculate these tasks. Is PS fast enough to to do that?

Also if I do implement in PL then how do I deal with calculations in fixed-point format? Can Vivado HLS automatically handle the calculations if I program these in C?

Thank you so much.

Regards,

Shan

zedman2000's picture
zedman2000
Moderator(2)
Hi,

Hi,

It is possible. You can use the AXI4-Memory Mapped interface. That will allow you to get the maximum data throughput into the PS.

I would think that the PS is fast enough, as we have example projects that shows 1080P video using a combination of PS and PL. By itself, the PS should be able to do VGA at 30FPS. This is of course using the NEON extensions. Although I still think 5MHz is perfectly fine.

I would consider dumping the samples into the PS in bursts. That will allow you to not waste as much time swapping back and forth between processing and running other tasks. I would think that a burst should be the size of one processing unit (if you are performing an FFT or something).

I'm not sure what you are looking for regarding the fixed point math. Do you mean how to convert from floating point to fixed point?

If you have access to HSL (it is a paid option), you can check out this application note from Xilinx:
http://www.xilinx.com/support/documentation/application_notes/xapp599-fl...

If you can run in the PL, it will be more power efficient and give you more spare "PS" time to do other things. However it is faster to just drop in the AXI4 interface to get the data into the PS and run your C directly. That is one of the great things about Zynq!

I will say though, at the speeds you are talking, especially if you already have the code, I would probably just drop in the Interface and run my code on the PS. Less work and I would think it will run fine.

--Dan

mzeeshanarshad's picture
mzeeshanarshad
Junior(0)
One more query

Dan thank you for your detailed and helpful reply. I just have one more question. How do you get data data from ADC in bursts? In burst means I wait till I get n number of samples before I start some operation on PS? to have more efficiency?
Also when you say dumping the samples in PS, you mean saving the samples in DDR?

zedman2000's picture
zedman2000
Moderator(2)
The AXI interface uses a

The AXI interface uses a MASTER to SLAVE design. That means I would make the PL the master in this case. Then, you can keep track of samples. When you get enough for a burst, push that INTO the PS from the PL.

Yes, you are correct in the meaning of a BURST. This way, you are not wasting time swapping your PS registers in and out as you process the data. At 5MHz it likely will not matter, however good design practice!

When I say dumping into the PS, I mean either hold the samples in a Dual Port RAM that is in the PL. Then the PS can read that over an AXI interface. OR you can have the PL PUSH that into the DDR space. From the PS's perspective, it is all a memory map. So really, what is the easiest for your skill set is probably the actual structure.

I'd recommend thinking about your future needs for this product/design and trying to choose the design that makes sense for that.

--Dan