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How to interface PL logic in Wind River Pulsar™ Linux?

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17 posts / 0 new
armendzh's picture
armendzh
Junior(2)
How to interface PL logic in Wind River Pulsar™ Linux?

Is Wind River Pulsar Linux is an alternative to PetaLinux?
How can I call PL logic from it via AXI interconnect?

hockeyman1972's picture
hockeyman1972
Junior(11)
Pulsar and Programmable Logic

Wind River Pulsar is an alternative to PetaLinux for our Zynq SoMs, and as we go forward it is our intent to continue to enhance the user experience to make it the go-to platform for embedded application development.  PetaLinux still has a place as an easy-to-use memory-resident kernel and root file system, but Pulsar uses a non-volatile RFS allowing for a much larger set of packages that provide considerable flexibility in customizing the environment for production and development.  It also has the advantage of the optional security shield, providing long term support and upgrades to incorporate enhancements and provide protection against unwanted intrusions.
As with any Linux system, PL logic is accessed via the standard (or custom) drivers provided with the PL IP.  On an ARM-based system that lacks a BIOS, you must inform the OS of the location and characteristics of new hardware through the device tree.  And depending on the IP and it's inclusion in the mainline version on which Pulsar is based, you may also need to update the kernel configuration and rebuild the kernel using the free wr-core tools available from Wind River OpenSourceLabs. Kernel drivers are accessed programatically via ioctl, read and write, and sysfs drivers can be accessed directly from user space (even command line) by manipulating entries under the /sys folder.
Ron

armendzh's picture
armendzh
Junior(2)
Can I load Wind River via

Can I load Wind River via JTAG for initial testing and development?

hockeyman1972's picture
hockeyman1972
Junior(11)
Not a normal flow

The normal flow for this product is to begin with a certfied image that boots from uSD card, and do your application development in one of three methods:  1) on target, 2) using the Wind River Helix Application Cloud or 3) using a host cross-compiler with the Wind River OpenSourceLabs tools.   The HAC includes a full visual debugger for application code, which seamlessly integrates with your connected board.  You should also be able to use the Xilinx SDK to connect a debug session using the Ethernet cable, but I haven't tried that.

I don't believe there is any technical reason why you couldn't download the kernel over JTAG, but it is not a flow we have experimented with.

Ron

mnewell969's picture
mnewell969
Junior(1)
Can we get more info about compiling our PL with a Pulsar linux

Can we get more info about compiling our PL with a Pulsar linux system?  are there tutorials that can help us?
Matt

hockeyman1972's picture
hockeyman1972
Junior(11)
Hi Matt,

Hi Matt,

  We are currently working on a couple of tutorials, one for SPI and one for I2C devices, that were implemented for our new MicroZed IIoT kit.  These should be available under the IIoT Kit reference design section of this website over the next couple of weeks, so watch for them.

Typically if you are adding custom IP you will need to rebuild at least a subset of the Pulsar components using the Wind River wr-core environment, available from Wind River Open Source Labs.   The way to get started is to install that environment, and follow the readme in the repository for compiling the Pulsar components.  This will give you some practical experience putting the image together from scratch, and this experience will make the steps in the reference designs more familiar when you see them.

See:   https://github.com/WindRiver-OpenSourceLabs/wr-core

Ron

 

mnewell969's picture
mnewell969
Junior(1)
any tutorials yet?

Hockeyman1972, any tutorials yet?

mnewell969's picture
mnewell969
Junior(1)
any tutorials yet?

Hockeyman1972, any tutorials yet?

mnewell969's picture
mnewell969
Junior(1)
Hockeyman1972, any tutorials

Hockeyman1972, any tutorials yet?

Freddos's picture
Freddos
Junior(0)
I'm also a bit curios if such

I'm also a bit curios if such a document has been created yet. Lacking something to tell me how to start the merge between Vivado PL output (our custom IP) with the Pulsar wr-core building process. More investigation and testing will ofcourse get me there but it would be good starting point for us newcomers :-)

JFoster's picture
JFoster
Moderator(48)
Hi Freddos,

Hi Freddos,

Yes we have them posted. You can find them at http://zedboard.com/support/design/13591/116

--Josh

Freddos's picture
Freddos
Junior(0)
Thanks a bunch Josh,

Thanks a bunch Josh,
 
We have a PicoZed board so that explains why I didn't find it among those links, but this is great. Now I know what steps to take when trying to make out custom PL implementation. As the newbe I am in my previous trial and error approach it was difficult seprating what is xilinx petalinux only stuff among their documentation.

mnewell969's picture
mnewell969
Junior(1)
When we are trying to bring

When we are trying to bring down metabrowser from github into layers/metabrowser we get an error.  the connection times out after a long pause.
Not sure how to proceed with installing the wr-core environment
 

hockeyman1972's picture
hockeyman1972
Junior(11)
Try again and more info

Hi,

  I have downloaded and built from the OpenSourceLabs site to my Ubuntu Linux workstation successfully in the past 2 days.  However, early on I have seen a simiilar issue to the one you describe (this was about a year ago) where the download hung.  I talked with Wind River and they had no explanation - and when I tried it again the next day it worked fine.

So...I would try it again today.  If it doesn't work, capture the error in a log and post it here (just the last relevent lines if it hangs).  I will forward to Wind River and get a resolution.

Not that it should matter, but what OS are you using on the host where you are attempting the clone?

Ron

mnewell969's picture
mnewell969
Junior(1)
tried again and here is what i get

Submodule path 'layers/fsl-ls10xx': checked out 'ca45b6815a67a4713e21ff5760694142cbf733b3'
Cloning into 'layers/meta-browser'...
fatal: unable to connect to github.com:
github.com[0: 192.30.252.122]: errno=Connection timed out

Clone of 'git://github.com/OSSystems/meta-browser.git' into submodule path 'layers/meta-browser' failed
mnewell@pn1212933:~$ ping github.com
PING github.com (192.30.252.120) 56(84) bytes of data.
64 bytes from github.com (192.30.252.120): icmp_seq=1 ttl=49 time=77.2 ms

mnewell969's picture
mnewell969
Junior(1)
I am using Ubuntu 14.04LTS

I am using Ubuntu 14.04LTS

mnewell969's picture
mnewell969
Junior(1)
trying to go through the wr-core build process.

We are trying to get through the build process for building pulsar using the wr-core instructions
here is what we are seeing after a couple of hours
 WARNING: Failed to fetch URL http://zlib.net/pigz/pigz-2.3.1.tar.gz, attempting MIRRORS if available

WARNING: Failed to fetch URL http://linux-pam.org/library/Linux-PAM-1.1.6.tar.bz2, attempting MIRRORS if available

WARNING: Failed to fetch URL ftp://ftp.debian.org/debian/pool/main/b/base-passwd/base-passwd_3.5.29.t..., attempting MIRRORS if available

WARNING: Failed to fetch URL ftp://ftp.debian.org/debian/pool/main/libc/libcap2/libcap2_2.22.orig.tar.gz, attempting MIRRORS if available

WARNING: Failed to fetch URL http://downloads.sourceforge.net/project/libpng/libpng16/1.6.13/libpng-1..., attempting MIRRORS if available

WARNING: Failed to fetch URL git://www.jdl.com/software/dtc.git, attempting MIRRORS if available

WARNING: The free space of /root/wr-core/build-xilinx-zynq/tmp (/dev/sda1) is running low (0.999GB left)