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J6 Serial port appears to not be working

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jbattles
Junior(1)
J6 Serial port appears to not be working

I can't seem to get any communication on the J6 serial port.  I've connected a known working FTDI 3.3V serial cable matching RX->TX and TX->RX pins.  Settings are 115.2Kbaud 8-N-1 no flowctrl.  There is no data coming out of the port.  If I connect via wifi and look at "dmesg |grep tty" I can see that the linux boot kernel shows it being mapped to a console.  There are 3 serial ports present: ttyPS0, ttyPS1, ttyP2
I am using the original sd card that came with the board to boot.   The files on the system are dated 3/27/2018 and the kernel is 4.9.0-xilinx-v2017.3 built on 2/26/2018.
I've hooked up an oscope to pin 2 on J6 (TX) and watched it from power-on.  There is no data coming out pin 2..  The pin is steady at 3.3V.  Pin 1 is also  at 3.3V as expected by the pullup on the board.   I have checked the voltages at all pins on U4 and they seem to be the correct value.  Grounding pin 1 passes through U4.  So it appears U4 is opperating correctly.  The U4 pins going to the FPGA are it 1.8V.
 
 

JFoster
Moderator(76)
Hello Jbattles,

Hello Jbattles,

Today I successfully received data over the 3 pin header. Your issue could be a few things.

Are you using the Out of Box image expecting to see somthing? If so that is a problem as the OOB does not have that J6 UART enables.

If you are using your own Hardware Platform in which you enabled Uart at MIO Pins 1 and 2, please make sure in your BSP you are targeting the correct UART.

--Josh

jbattles
Junior(1)
I believe I am using the OOB

I believe I am using the OOB image if that's the image that came on the microSD card iincluded in the box.  Why is this not enabled on the OOB image ?  If I convert the device tree binary back to a source file from the OOB card boot partition it shows both uart0 and uart1 are in there.  The Linux Kernel finds both uartps during boot and assigns PS0 (uart1) to console.   So if uart1 is not mapped to the J6 pins, then is the vivado hardware specification out of sync with the device tree binary when the boot image is built ? 
Right now there is no source files avaialbe to rebuild the OOB image, do you guys plan on posting the OOB project ?  I can't even download the original firmware files from thsi website.  It asks to login,but when I login again on clicking the register/login button next to the original firmware files, the webiste just redirects me to a different page.
Do you have an ETA when the ultra96.org part of this site will be updated with more information and example stuff ? 
I have a new vivado project I am working on for the ultra96, but it will take a while to figure out how to get all the way from the FPGA stuff through builiding a boot partition.  I've done it for the Zynq, but the MPSOC seems a bit more complicated.  I'll try to follow the UltraZed tutorial, but it's a bit dated with Vivado 2016.x.
 
 
 

jbattles
Junior(1)
serial port h/w test with standalone app.

I was able to hack together an example ps_uart helloworld standalone program via vivado and sdk and able to see data coming out of  the serial port.  So the h/w seems to be working correctly.  I couldn't quite figure out how to get the basic program hello world example program to use the ps_uart1 for stdout, stdin.  So I loaded the example for the psuart driver which was setup for 32 bit mode and wouldn't compile, but I was able to take the code from it and hack it into the hello world basic program and then get data out on the serial port.  I was using a platform cable II to connect to the Ultra96 board via the JTAG connectors.  So I can also check off that the JTAG interface works on the board along with the J6 serial port.
It's too bad the OOB sdcard image does not have it working.  Having a working console on a serial port is a fundamental debug tool on an embedded system.   I  hope the team at Avnet ES can fix the OOB image and upload a  new one to this website.  I've been trying to debug some issues with USB 3.0 and an ssh shell over wifi becomes non-responsive.  I wanted to see if the same thing happened to the serial port console, but couldn't because J6 serial port was not enabled.
It would also be nice if the orignal vivado project for the ultra96 would be posted as a starting point.  Looking at the device tree file shows there's some peripherals added to the PL logic like an extra serial port.  I don't know what else is in there, but there's a lot of DMA blocks.
Hopefully the AES team gets some more stuff posted to the site soon.  The Ultra96 board seems like the best way to start learning about the Ultrascale+ Zynq MPSoC for those of us without large corporate R&D budgets to buy more expensive development platforms.  I have a nice high speed DAQ project I think I can use the board for, but need to get USB 3.0 working first.
I'd recommend keeping the issue open until the AES team fixes and makes available and image with working J6 serial port as a linux console.  It's an expected out of box working feature of the board, but that's a decisions for Mr. moderator.

userid0
Junior(0)
Hi,

Hi,
I faced the same isse. I hooked up my favorite debug probe and stopped in the FSBL phase. I can clearly see that the MIO0 & MIO1 pinmux is set to GPIO instead of UART1.
I modified the IOU_SLCR.MIO_PIN_0 & MIO_PIN_1 register and I see a terminal output then...
PMU Firmware 2017.3     Feb 26 2018   16:41:02
PMUFW:  v0.3
U-Boot 2017.01 (Mar 07 2018 - 16:29:30 -0800) Xilinx ZynqMP ZCU100 RevC
I2C:   ready
DRAM:  2 GiB
EL Level:       EL2
Chip ID:        xczu3eg
MMC:   sdhci@ff160000: 0 (SD), sdhci@ff170000: 1
reading uboot.env

** Unable to read "uboot.env" from mmc0:1 **
Using default environment

In:    serial@ff010000
Out:   serial@ff010000
Err:   serial@ff010000
Bootmode: SD_MODE
Net:   Net Initialization Skipped
No ethernet found.

JFoster
Moderator(76)
Hi,

Hi,

To get the baremetal application to use PS_Uart1, you need to modify the BSP system.mss file for your application. When you select Modify this BSPs settings, on the left hand  tab, select standalone. There you will see stdin and stdout are set to psu_uart_0, change these to psu_uart_1 to target uart1.

--Josh

userid0
Junior(0)
Hi,

Hi,
I patched the fsbl in the shipped BOOT.BIN and solved the PinMux issue that way. You can find that image here.
  https://drive.google.com/open?id=1P8L21zPVdsG1uU6ldlx8w84iwvxGBVIf
My TRACE32 scripts are attached as reference.
--Alex
 

simongoda
Junior(0)
Changes to FSBL

Would you be able to provide some more information about what you did to change the FSBL and make the UART work? Thanks in advance. Simon