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Microzed development in EDK

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rdb9878's picture
rdb9878
Junior(0)
Microzed development in EDK

Greetings, I have a need to develop a system running on the Microzed board using older version of Xilinx ISE Design Suite(14.6, the older style EDK,ISE,PlanAhead, and SDK as opposed to Vivado).

I know most of the tutorials are focused on using Vivado and taking advantage of the "awareness" files so you are not starting from scratch...

Is there an equivalent way to import the Microzed's board info into EDK so I can just select it as my target hardware? I believe this was achieved by using *.xbd files on older Avnet boards?

Or do I need to start from scratch?

TroutChaser's picture
TroutChaser
Moderator(18)
Use the MicroZed Zynq Preset

Use the MicroZed Zynq Preset for ISE (XML) found here: http://www.zedboard.org/documentation/1519

 

Import the preset into your PS7 configuration in XPS:

 

Then select the XML file downloaded:

 

-Gary

rdb9878's picture
rdb9878
Junior(0)
Excellent, thank you!

Excellent, thank you!

rdb9878's picture
rdb9878
Junior(0)
Sorry to bring this back to

Sorry to bring this back to life, but I have encountered another problem. I have added some AXI bus pcores to the EDK project and connected to the processing_system7 device (the one I imported the xml file into). I could perform DRC and "Generate Netlist" with no errors.

I moved the remainder of the project into Xilinx ISE, using the auto-generated stub file and UCF files. This builds fine and gives me output files (*.bit, *.xml), but when I look into the "Module Level Utilization," it shows 0 resources being used for processing_system7...

Looking at the warning files, it appears as though every single IO associated with the processing_system7 is not being driven. Ex:

"ConstraintSystem - A target design object for the Locate constraint
'<NET "MIO<0>" LOC = E6>' could not be found and so the Locate constraint
will be removed."

I get the same type of message for every single MicroZed IO.

So there is something causing EDK or ISE to completely optimize the processing_system7 away...Any ideas what it could be?

I've seen similar things happen when the input oscillator signal was not routed to an ibufg component.

TroutChaser's picture
TroutChaser
Moderator(18)
I used PlanAhead to build a

I used PlanAhead to build a processing sub-design and imported the MicroZed XML within XPS. Then I exited back to PlanAhead and there I right clicked on the processor sub module and did a 'Create Top HDL'. I did have to go back and change the device targeted by the top level PlanAhead project to match the MicroZed device imported in the XML (zc7z010clg400-1). Note that the package is different than the one on the 7020 device on the ZedBoard if that is where you started.
 
After that I built the design and exported to SDK successfully and was able to build and run a Hello World application.
 
Check and make sure the device and package are correct for the MicroZed device for both the processor sub-system and the top level design.
 
-Gary

rdb9878's picture
rdb9878
Junior(0)
It turns out that I can

It turns out that I can safely ignore those hundreds of warnings because it appears to be working fine now. Strange that I got such severe sounding warnings...but oh well.