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Not able to program PL from PS using FPGA manager driver

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Gouthamp's picture
Gouthamp
Junior(0)
Not able to program PL from PS using FPGA manager driver

Hi,

I want to program my PL from PS in my Ultrazed board that has Zynq Ultrascale+. 

I have enabled FPGA manager in kernel configuration  and made available FPGA manager driver in my kernel ( using petalinux 2016.3). When I initially tried writing .bin file of bitstream to firmware, it said " write error: invalid argument" . Can someone shed some light on this error? 

I have referred to other forums and AR like https://www.xilinx.com/support/answers/68246.html and did those tweeks. Still getting this error called "invalid argument"  error when I echo the binary format of bitfile to /sys/class/fpga_manager/fpga0/firmware. 
 

$mount /dev/mmcblk0p1 /media
$ mkdir /lib/firmware
$cp /media/bitstream.bin /lib/firmware/
$echo bitstream.bin > /sys/class/fpga_manager/fpga0/firmware
right after echoing bitstream.bin, I am getting 
 

[ 1625.057033] fpga_manager fpga0: writing bitstream.bin to Xilinx ZynqMp FPGA Manager
[ 1625.079420] fpga_manager fpga0: Error while writing image data to FPGA
-sh: echo: write error: Invalid argument

Can someone help me out here?

Gouthamp's picture
Gouthamp
Junior(0)
Program PL from PS using FPGA manager in Linux.

Has anyone done PL programming from PS in Ultrazed , using FPGA manager firmware in linux. Just needed a quick discussion on how they did it successfully.  

Gouthamp's picture
Gouthamp
Junior(0)
Solved : Steps taken

Hi,
Finally got it working.

#Created using petalinux 2016.3

#Added SDHCI and PHY nodes to the device tree files manually , before building.

#Got SDHCI and PHY nodes format from Avnet Github.

#Also added patches to psu_init.c in the FSBL source and platform-top.h in U-Boot sources. Got patch files from Avnet Github.

#Also added memory node address  manually in the device tree. It was a bug in the petalinux 2016.3.

#used SDK 2016.4 to create version 0.2 of PMUFW.elf and included that in the BOOT.BIN
~