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PL to PS Interrupt

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raymadigan's picture
raymadigan
Junior(0)
PL to PS Interrupt

I am trying to implement simple PL to PS interrupt using the IRQ_F2P line on the Zynq.   I have an AXI Lite component that exports a pin with single pin interface as interrupt.  I can watch it go high in an ILA for a single clock cycle when I want the interrupt to run.
 
On the PS I have the following code:

#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID

 

////#define XPS_FPGA0_INT_ID 61U from xparameters.h

#define INTC_DEVICE_INT_ID XPS_FPGA0_INT_ID

 

Status = XScuGic_Connect(&InterruptController, INTC_DEVICE_INT_ID,

                                                 (Xil_ExceptionHandler)DeviceDriverHandler,

                                                 (void *)&InterruptController);

 

// If I simulate the interrupt without pulling the interrupt pin high it seems to work

Status = XScuGic_SoftwareIntr(&InterruptController,

                                                        INTC_DEVICE_INT_ID,

                                                        XSCUGIC_SPI_CPU0_MASK);

 

But it doesn't work with the real interrupt.  This is supposed to be easy, is there something I didn't do?  

I can show all of the code, it is basically the example from he ScuGic example in the SDK.

 

Thanks

 

JFoster's picture
JFoster
Moderator(55)
Hello Raymadigan,

Hello Raymadigan,

If you haven't yet I would suggest going through our ZynqHW lab Speedways. In those speedway labs we implement a PL to PS interrupt using the IRQ_F2P. At the very least I would compare that setup to your own.

http://zedboard.com/course/developing-zynq%C2%AE-7000-all-programmable-s...

Also what Vivado/SDK version are you using?

--Josh

raymadigan's picture
raymadigan
Junior(0)
I thought I did but will do

I thought I did but will do it again, I wasn't sure how it is restructured.  The link you send doesn't work.  I will see what I can, if you could point me to the right place I would appreciate it.
 
I am using windows 10 and vivado 2016.2

JFoster's picture
JFoster
Moderator(55)
Hi Raymadigan,

Hi Raymadigan,

Sorry about that, here is the link

 http://zedboard.com/course/developing-zynq%C2%AE-7000-all-programmable-s...

Also note that you will need the correct vivado version to complete this lab. On another note we are going to be posting a 2016.2 revision of these labs shortly. Your error kind of reminds me of an issue I had when I was in the process of updating these labs. I'll refer you to a post that I responded to that may be of assistance. Please see bottom two posts.

http://zedboard.com/content/speedway-lab-10-difficulties

--Josh

raymadigan's picture
raymadigan
Junior(0)
Josh,

Josh,
Thanks for your response.  I found the Auto Infer Interface yesterday so I went back to make sure I didn't mess that up.  This pin is listed in the Ports and Interface section as an expandable element.  In the interface mode it has master and nothing else is marked.  When I expand it the pin has direction out and type name is std_logic.
In the IP I have two of these pins, nothing is connected to the second but it is exactly the same.  I had this connected to a concat but it didn't work and to try to see why I disconnected it.  I am in the process of totally removing it to make it easier to see what is going wrong.
To do the PS side I copied the code from the xilinx sdk examples and what they had is nearly the same as the speedway workshop.   The only difference is a call to Xil_ExceptionInit(); before XIL_ExceptionRegisterHandler(...);  
 
One difference is that the IP that I am using to generate the interrupt is an AXI Lite IP That I use to transfer small data chunks between the PS and the PL.  I want to use the interrupts to signal when data is ready so the PS doesn't have to poll.
 
My next step is to build a small version that only does what I need that is isolated from the rest of my application to help isolate the issue.  

raymadigan's picture
raymadigan
Junior(0)
I built a board with only the

I built a board with only the AXI Lite component that when a 1 is sent to register 0 it pulls an exported line high for one clock cycle.  The line is auto inferred to be an interrupt.  I can watch the line go high in an ILA.  Still the interrupt doesn't file.
 
 

raymadigan's picture
raymadigan
Junior(0)
I found the problem,

I found the problem, Something I missed when I read the Speedway work twice, :(.  I wasn't setting the priority correct.  When I just used your values it worked in the isolated case and I suspect it will work in the product.  Thanks for all of your help.

JFoster's picture
JFoster
Moderator(55)
Hi Raymadigan,

Hi Raymadigan,

Glad to hear! I appreciate you posting your solution as well. Hopefully it will help someone else in the future.

--Josh