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Zynq HIL Co-Simulation on ZedBoard

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Zynq HIL Co-Simulation on ZedBoard

Dear all,

so far I have been experimenting with Xilinx' Evaluation Board (ZC702), and I just switched over to ZedBoard for several reasons.

There is one huge issue I need to deal with regarding the new board, and that would be the simulation. There is a HW Co-Simulation option available for Zynq (since there is no RTL model), tagged as Zynq HIL (HW-in-the-Loop) Simulation. In order to be able to perform the HW Co-Simulation, one needs to specify the board at the additional fuse options of the Simulator. Since this method was first released by Xilinx end of June this year, while made useful middle of August, I wonder whether this is possible on ZedBoard or not, and if there is anyone who has dealt with it before.

Just out of curiosity, how have you people been designing for Zynq in an effective way without this extremely important feature? Just by using ChipScope, etc., while waiting ages for the implementation of your design every time you change a single line of code?

Thanks in advance and best regards,
David

TimDuffy
Junior(2)
dfuschelberger,

dfuschelberger,

In reference to how I design for all FPGA's, including Zynq:

I traditionally validate all of my HDL code with extensive test benches using iSIM.

As for testing ARM based code, xilinx has released a qemu-based emulator for the ARM core. It can be found here: http://wiki.xilinx.com/zynq-qemu

Tim,

Tim,

thanks for your reply, but the methods you mention are rather conventional. In regards to SW debugging, there are definitely better options available than the qemu model, regardless of whether an OS is used or not.

Anyway, HW co-simulation has proven its value in the past, too. Zynq is an innovative combination of a hard-core proc and FPGA fabric, and communication between those two may at some point get quite complex, making traditional methods of debugging them separately rather inconvenient (in comparison to the proposed solution).

No offense, just exchanging personal opinions! :-)

So you don't know anything about HIL on ZedBoard, I presume?!

Cheers,
David

TimDuffy
Junior(2)
David,

David,

My apologies for not understanding your question fully. I do not know what the timeline for HIL is for Zynq, I will see if I can come up with something for you.

No need for apologies Tim! :-

No need for apologies Tim! :-) Thanks for looking into it!

umangparekh
Junior(0)
Zynq HIL is not supported on

Zynq HIL is not supported on Zedboard yet...

Hi umangparekh,

Hi umangparekh,

thanks for the update. Any idea if they're planning to support it?

Thanks,
David

Just found out about it

Just found out about it myself: it's surely NOT going to be supported before Q1 2013.

David

harish89
Junior(0)
Is the support for Zynq HIL out yet?

Point me to any links or reference design for modelling HIL on the Zynq board

Thanks in advance

shakith
Junior(0)
Is there an update on support

Is there an update on support for HIL on the zedboard? Is it hardware/software issue in ISE itself?
just adding the board to bsp is not enough?
http://www.zedboard.org/content/hil-zynq