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Designing Accelerators for the Zynq®-7000 All Programmable SoC

System-on-Chip designs offer the unique advantage of providing custom built accelerators to increase system performance. This intermediate-level course introduces attendees to the design flow required in identifying software bottlenecks and creating custom hardware accelerators in the Programmable Logic (PL) portion of the Xilinx Zynq®-7000 All Programmable SoC. Students will use profiling techniques to identify acceleration opportunities and simulate and synthesize a C-based accelerator for the PL using the Xilinx Vivado® HLS tool. Students will use the IP Integrator feature in the Vivado Design Suite to perform final integration of the accelerator into the PL and identify the most appropriate interface for connection with the processing system.
 
Pre-requisites:
 
Completion of the "Developing Zynq-7000 All Programmable SoC Software" and "Developing Zynq-7000 All Programmable SoC Hardware" courses or equivalent knowledge is required.
 
Laptop/workstation with ZedBoard or MicroZed kit

Table of Contents

Chapter-1 Course Agenda View
Chapter-2 Application Profiling View
Lab-1 Measuring Performance and Profiling
Chapter-3 Developing the Accelerator Using HLS View
Chapter-4 Understanding the PS and PL Connections View
Lab-2 Building a Hardware Accelerator Using Vivado® HLS
Chapter-5 Building the Embedded System Using IPI View
Lab-3 Building an Embedded System with Custom IP
Lab-4 Final Performance Measurements
Chapter-6 Accelerator File Management View