Developing Zynq®-7000 All Programmable SoC Hardware (Vivado 2015.2 and 2016.2)

This class demonstrates the hardware and software flows for creating your first Xilinx Zynq®-7000 All Programmable SoC design. Through a series of instructor presentations (based on 2013.3) and hands-on labs ( 2015.2 and 2016.2), hardware and firmware engineers will learn all the required steps for creating a Zynq-7000 All Programmable SoC design on either ZedBoard™ or MicroZed™. It covers the architecture of the ARM® Cortex™-A9 processing system (PS) and the integration of programmable logic (PL). The course also details the individual components that comprise the PS, I/O peripherals, clocking, interrupt, AXI interfaces and memory controllers. Emphasis is placed on efficient PL-to-PS interfacing including integration of custom PL-based IP.  To complete the design cycle, the critical steps of hardware debugging techniques are also shown.

Pre-requisites:

• Completion of the “Developing Zynq-7000 All Programmable SoC Software” course or equivalent knowledge is required.
• Familiarity with the Zynq-7000 All Programmable SoC architecture is also recommended.
• Laptop/workstation with ZedBoard, MicroZed kit, or PicoZed + PicoZed FMC Carrier Card V2. PicoZed is only compatible with the 2016.2 lab version.

      Download the labs (Vivado 2015.2)

        Download the labs (Vivado 2016.2)