The following reference designs are provided “AS IS”. If you have questions, please utilize the on-line forums in seeking help.
The design consists of a Zynq subsystem and I added (3) single channel soft GPIO peripherals to interface to the:
- 5 buttons
- 8 switches
- 8 LEDs
There is an SDK peripherals_test application that reads back the buttons and switches and reports the button and switch values in the terminal (115,200 baud). It also cycles the 8 LEDs long enough to see them (~20 iterations).
This tutorial provides a means to integrate several different technologies on a single platform. Using the Avnet ZedBoard, we have the power of a 32-bit 667 MHz dual core Arm-9 Cortex processor chip, combined with the unrivaled flexibility of Xilinx programmable logic to implement custom hardware systems. We use a Linux kernel as the foundation operating system running on the processor cores, but also add on a fully featured desktop from Ubuntu, contained in the root file system. The desktop allows the ZedBoard to function as a personal computer using a USB Keyboard and mouse, along with an HDMI monitor.
Iperf is most commonly used for measuring maximum TCP and UDP bandwidth performance. Iperf allows the tuning of various parameters and UDP characteristics. Iperf also has capability to report bandwidth, delay jitter, and datagram loss. This tutorial builds upon the Zynq Linux SpeedWay training material and describes how to build Iperf from source code and use this application for network performance testing on ZedBoard or MicroZed.
This tutorial builds upon the Zynq Linux SpeedWay training material and describes how to implement USB host functionality for ZedBoard. The 14.4 and 14.5 versions of the tutorial also include instructions for updating to later releases of the Zynq Linux kernel.
This ZedBoard adaptation of Xilinx application note XAPP1026 describes how to utilize the lwIP library to add networking capability to an embedded system. In particular, lwIP is utilized to develop these applications: echo server, Web server, TFTP server, as well as receive and transmit throughput tests.
This ZedBoard adaptation of Xilinx application note XAPP1079 describes a method of starting up both processors, each running its own bare-metal software application, and allowing each processor to communicate with the other through shared memory.
Note: Requires Analog Devices SDR Kit, MathWorks MATLAB & Simulink R2012b (DSP and Signal Processing Toolboxex), and ISE DSP Edition
The Zynq-7000 SoC / Analog Devices SDR Kit base demonstration design provides a Linux-based framework for baseband and RF signal transmission and reception; a good starting point for integration of user-defined functionality for wireless communications. This demo uses model-based design techniques with MathWorks Simulink and Xilinx System Generator for system-level simulation of a QPSK symbol generator and digital up/down-converter signal chain, which will subsequently augment the base design of the SDR kit.
Note: Requires MathWorks MATLAB R2013b & Embedded Coder Support Package for Xilinx Zynq-7000 Platform
Provides a basic Linux system with 3.3.0 kernel based upon the 14.2 release tags from the Xilinx kernel repository, along with modifications to support the MathWorks Embedded Coder Support Package for Xilinx Zynq-7000 Platform on ZedBoard. The binaries included in this archive can be copied to an SD card and used to boot ZedBoard. The archive includes instructions to recreate these binaries starting from the Xilinx Open Source repository. More information on Xilinx Zynq Support from Simulink, including examples and required software, can be found at www.mathworks.com/zynq
Note: Requires Development Studio 5 (DS‐5) Software Suite and DSTREAM Debugging tools plus the ZedBoard Processor Debug Adapter accessory
These lab-based tutorials explore various ARM® processor application debug techniques on the Xilinx Zynq-7000 SoC based MicroZed and ZedBoard development platforms using ARM DS-5. The series begins with the most basic tool configuration and board connection. It takes you all the way through dual core asynchronous debugging, Linux application and kernel debugging, profiling and application trace to root out design errors that are otherwise apparent only in very complex use cases, or worse, after a product is released.