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Maxim Pmod: Campbell 16-Bit High-Accuracy 4-20mA Input Isolated Analog Front End (AFE)

The Campbell firmware design is also developed and tested for the ZedBoard kit and targets an ARM® Cortex® -A9 processor placed inside a Xilinx Zynq system-on-chip (SoC).

An AXI MAX11100 custom IP core is created for this reference design to optimize the sampling rate and SPI timing stability.

The firmware is a working example of how to interface to the hardware, collect samples, and save them to memory. The firmware is written in C using the Xilinx SDK tool, which is based on the Eclipse open source standard. Custom Campbell-specific design functions were created utilizing the AXI MAX11100 custom IP core. The SPI clock frequency is set to 4.54MHz when a 189.4ksps sampling rate is selected. The SPI clock frequency is set to 2.5MHz for all other sampling rate.

Project Type: 
Hardware - Pmod
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