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Getting started with custom VHDL and Linux

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dargaud's picture
dargaud
Junior(0)
Getting started with custom VHDL and Linux

Hello all,
I'm just getting started with a zedboard where I have to write some application software. So I'm fine with using the standard Linux that comes with it. But the thing is that our electronics guy has to write a custom VHDL for it.

What does he need to give me exactly to put on the card ? A boot.bin and a dts file ? Is that all ?

So after I convert the dts to dtd, all I need to have on the card is:
System.map
boot.bin
devicetree.dtb
uImage
uramdisk.image.gz

Is that correct or do I need to recreate the files (System.map, uImage, uramdisk) as well ?
Thanks

dargaud's picture
dargaud
Junior(0)
To be more specific, I see

To be more specific, I see the page here http://www.wiki.xilinx.com/Prepare+boot+image about generating the boot.bin, I have all the ingredients (I think), but I don't see when I'm supposed to place the system.bit VHDL file...

zedhed's picture
zedhed
Moderator(22)
RE: To be more specific, I see

Hi dargaud,

Inside that BIF example, as you mentioned, they do not mention where the bitstream file (in your case system.bit) gets inserted.

The bistream should be inserted between the FSBL image and the first user executable (in your case it is uboot.elf) so the Boot Image Format (BIF) listing would look like this:

image : {
[bootloader]fsbl.elf
system.bit
u-boot.elf [load=0x2a00000]
devicetree.dtb [load=0x2000000]
uramdisk.image.gz [load=0x3000000]
uImage.bin // currently bootgen requires a file extension. this is just a renamed uImage }

Then you can use that BIF to create a boot image containing your bitstream and the other pieces needed to boot Linux.

Regards,

-Kevin

zedhed's picture
zedhed
Moderator(22)
RE: To be more specific, I see

Hi dargaud,

You could also have U-Boot load the devicetree.dtb, uramdisk.image.gz, and uImage files from the boot medium into memory.

In that case you would only need the FSBL, the Bitstream, and U-Boot in the Zynq Boot Image:

image:

{

  [bootloader]fsbl.elf

  system.bit

  u-boot.elf

}

Regards,

-Kevin

dargaud's picture
dargaud
Junior(0)
Thanks you, that clears

Thanks you, that clears things up a bit... But I don't have the bootgen utility. I'm only the software guy, so I don't have XPS/etc installed, I only use the gnu-eabi compilers. Can I find bootgen somewhere without installing the whole Xilinx tools ? Is this it: https://github.com/phsilva/zynq-bootgen ?
Thanks

dargaud's picture
dargaud
Junior(0)
OK, thanks.

OK, thanks.
I had the other guy generate the boot.bin for me, but the boot process loks up. Here's my dts and resulting boot log:
Anything wrong ?

/*
* Device Tree Generator version: 1.1
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
*
* Michal SIMEK <monstr@monstr.eu>
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 14.7 EDK_P.20131013
* Today is: Wednesday, the 16 of April, 2014; 16:41:49
*
* XPS project directory: device-tree_bsp_0
*/

/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial1 = &ps7_uart_1;
spi0 = &ps7_qspi_0;
} ;
chosen {
bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
linux,stdout-path = "/amba@0/serial@e0001000";
} ;
cpus {
#address-cells = <1>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
bus-handle = <&ps7_axi_interconnect_0>;
clock-latency = <1000>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
operating-points = <666667 1000000 333334 1000000 222223 1000000>;
reg = <0x0>;
} ;
ps7_cortexa9_1: cpu@1 {
bus-handle = <&ps7_axi_interconnect_0>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x1>;
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 5 4>, <0 6 4>;
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
reg-names = "cpu0", "cpu1";
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges ;
inter_peall4_0: inter-peall4@67600000 {
compatible = "xlnx,inter-peall4-1.00.a";
reg = <0x67600000 0x10000>;
xlnx,dphase-timeout = <0x8>;
xlnx,num-mem = <0x1>;
xlnx,num-reg = <0x1>;
xlnx,s-axi-min-size = <0x1ff>;
xlnx,slv-awidth = <0x20>;
xlnx,slv-dwidth = <0x20>;
xlnx,use-wstrb = <0x0>;
} ;
leds_8bits: gpio@41220000 {
#gpio-cells = <2>;
compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x41220000 0x10000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,instance = "LEDs_8Bits";
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8008000 0x1000>;
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8009000 0x1000>;
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800a000 0x1000>;
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800b000 0x1000>;
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,zynq-ddrc-1.0";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 8 4>;
reg = <0xf8007000 0x100>;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
clock-names = "apb_pclk";
clocks = <&clkc 27>;
compatible = "arm,primecell", "arm,pl330";
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
"dma4", "dma5", "dma6", "dma7";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
reg = <0xf8003000 0x1000>;
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 22 4>;
local-mac-address = [00 0a 35 00 00 00];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <111111115>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@7 {
compatible = "marvell,88e1116r";
device_type = "ethernet-phy";
reg = <7>;
} ;
} ;
} ;
ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-global-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 11 0x301>;
reg = <0xf8f00200 0x100>;
} ;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
clocks = <&clkc 42>;
compatible = "xlnx,zynq-gpio-1.0";
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 20 4>;
reg = <0xe000a000 0x1000>;
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = <0xe0200000 0x1000>;
} ;
ps7_ocmc_0: ps7-ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 3 4>;
reg = <0xf800c000 0x1000>;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-level = <2>;
cache-unified ;
compatible = "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 2 4>;
reg = <0xf8f02000 0x1000>;
} ;
ps7_qspi_0: ps7-qspi@e000d000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,zynq-qspi-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 19 4>;
is-dual = <0>;
num-chip-select = <1>;
reg = <0xe000d000 0x1000>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-mode = <0x0>;
} ;
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,ps7-qspi-linear-1.00.a";
reg = <0xfc000000 0x1000000>;
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = <2>;
#interrupt-cells = <3>;
#size-cells = <1>;
compatible = "arm,cortex-a9-gic", "arm,gic";
interrupt-controller ;
num_cpus = <2>;
num_interrupts = <96>;
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 13 0x301>;
reg = <0xf8f00600 0x20>;
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 14 0x301>;
reg = <0xf8f00620 0xe0>;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <50000000>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "arasan,sdhci-8.9a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon";
ranges ;
reg = <0xf8000000 0x1000>;
clkc: clkc@100 {
#clock-cells = <1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1", "uart0", "uart1",
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
ps-clk-frequency = <33333333>;
reg = <0x100 0x100>;
} ;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
clocks = <&clkc 6>;
compatible = "cdns,ttc";
interrupt-names = "ttc0", "ttc1", "ttc2";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
reg = <0xf8001000 0x1000>;
} ;
ps7_uart_1: serial@e0001000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 24>, <&clkc 41>;
compatible = "xlnx,xuartps";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 50 4>;
port-number = <1>;
reg = <0xe0001000 0x1000>;
xlnx,has-modem = <0x0>;
} ;
ps7_usb_0: ps7-usb@e0002000 {
clocks = <&clkc 28>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 21 4>;
phy_type = "ulpi";
reg = <0xe0002000 0x1000>;
} ;
ps7_xadc: ps7-xadc@f8007100 {
clocks = <&clkc 12>;
compatible = "xlnx,zynq-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 7 4>;
reg = <0xf8007100 0x20>;
} ;
sws_8bits: gpio@41200000 {
#gpio-cells = <2>;
compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x41200000 0x10000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,instance = "SWs_8Bits";
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
} ;
} ;

U-Boot 2014.01 (Apr 08 2014 - 09:47:28)

I2C: ready
Memory: ECC disabled
DRAM: 512 MiB
MMC: zynq_sdhci: 0
SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Net: Gem.e000b000
Hit any key to stop autoboot: 0
Device: zynq_sdhci
Manufacturer ID: 82
OEM: 4a54
Name: NCard
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.7 GiB
Bus Width: 4-bit
reading uEnv.txt
** Unable to read file uEnv.txt **
Copying Linux from SD to RAM...
reading uImage
3588776 bytes read in 317 ms (10.8 MiB/s)
reading devicetree.dtb
7964 bytes read in 15 ms (517.6 KiB/s)
reading uramdisk.image.gz
5619967 bytes read in 481 ms (11.1 MiB/s)
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.13.0-xilinx
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3588712 Bytes = 3.4 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 02000000 ...
Image Name:
Image Type: ARM Linux RAMDisk Image (gzip compressed)
Data Size: 5619903 Bytes = 5.4 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x2a00000
Loading Kernel Image ... OK
Loading Ramdisk to 1f5d2000, end 1fb2e0bf ... OK
Loading Device Tree to 1f5cd000, end 1f5d1f1b ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.13.0-xilinx (sorenb@xsjandreislx) (gcc version 4.7.2 (Sourcery CodeBench Lite 2012.09-104) ) #1 SMP PREEMPT 4
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Xilinx Zynq
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 8 pages/cpu @c1035000 s10688 r8192 d13888 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
[ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/ram rw earlyprintk
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 501696K/524288K available (4857K kernel code, 310K rwdata, 1708K rodata, 198K init, 5345K bss, 22592K reserved, 0K h)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc0671828 (6567 kB)
[ 0.000000] .init : 0xc0672000 - 0xc06a39c0 ( 199 kB)
[ 0.000000] .data : 0xc06a4000 - 0xc06f1ad0 ( 311 kB)
[ 0.000000] .bss : 0xc06f1adc - 0xc0c2a1b0 (5346 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] RCU lockdep checking is enabled.
[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] ps7-slcr mapped to e0802000
[ 0.000000] zynq_clock_init: clkc starts at e0802100
[ 0.000000] Zynq clock init
[ 0.000000] sched_clock: 32 bits at 333MHz, resolution 3ns, wraps every 12884901885ns
[ 0.000000] ps7-ttc #0 at e0804000, irq=43
[ 0.000000] Console: colour dummy device 80x30
[ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.000000] ... MAX_LOCK_DEPTH: 48
[ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
[ 0.000000] ... CLASSHASH_SIZE: 4096
[ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.000000] ... CHAINHASH_SIZE: 16384
[ 0.000000] memory used by lock dependency info: 3695 kB
[ 0.000000] per task-struct memory footprint: 1152 bytes
[ 12.877214] Calibrating delay loop... 1325.46 BogoMIPS (lpj=6627328)
[ 12.877221] pid_max: default: 32768 minimum: 301
[ 12.877222] Mount-cache hash table entries: 512
[ 12.877224] CPU: Testing write buffer coherency: ok
[ 12.877225] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 12.877226] Setting up static identity map for 0x49ac68 - 0x49acc0
[ 12.877227] L310 cache controller enabled
[ 12.877227] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
[ 12.877242] CPU1: Booted secondary processor
[ 12.877256] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 12.877256] Brought up 2 CPUs
[ 12.877258] SMP: Total of 2 processors activated.
[ 12.877259] CPU: All CPU(s) started in SVC mode.
[ 12.877260] devtmpfs: initialized
[ 12.877262] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 12.877264] regulator-dummy: no parameters
[ 12.877265] NET: Registered protocol family 16
[ 12.877266] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 12.877268] cpuidle: using governor ladder
[ 12.877269] cpuidle: using governor menu
[ 12.877273] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
[ 12.877275] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 12.877276] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 12.877277] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0880000
[ 12.877287] bio: create slab <bio-0> at 0
[ 12.877288] GPIO IRQ not connected
[ 12.877288] XGpio: /amba@0/gpio@41220000: registered, base is 248
[ 12.877289] GPIO IRQ not connected
[ 12.877290] XGpio: /amba@0/gpio@41200000: registered, base is 240
[ 12.877292] vgaarb: loaded
[ 12.877292] SCSI subsystem initialized
[ 12.877293] usbcore: registered new interface driver usbfs
[ 12.877294] usbcore: registered new interface driver hub
[ 12.877295] usbcore: registered new device driver usb
[ 12.877296] media: Linux media interface: v0.10
[ 12.877297] Linux video capture interface: v2.00
[ 12.877298] pps_core: LinuxPPS API ver. 1 registered
[ 12.877299] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 12.877300] PTP clock support registered
[ 12.877301] EDAC MC: Ver: 3.0.0
[ 12.877303] DMA-API: preallocated 4096 debug entries
[ 12.877304] DMA-API: debugging enabled by kernel config
[ 12.877305] Switched to clocksource arm_global_timer
[ 12.877314] NET: Registered protocol family 2
[ 12.877315] TCP established hash table entries: 4096 (order: 2, 16384 bytes)
[ 12.877316] TCP bind hash table entries: 4096 (order: 5, 147456 bytes)
[ 12.877317] TCP: Hash tables configured (established 4096 bind 4096)
[ 12.877318] TCP: reno registered
[ 12.877319] UDP hash table entries: 256 (order: 2, 20480 bytes)
[ 12.877320] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes)
[ 12.877321] NET: Registered protocol family 1
[ 12.877322] RPC: Registered named UNIX socket transport module.
[ 12.877323] RPC: Registered udp transport module.
[ 12.877324] RPC: Registered tcp transport module.
[ 12.877325] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 12.877326] Trying to unpack rootfs image as initramfs...
[ 12.877241] Freeing initrd memory: 5488K (df5d2000 - dfb2e000)
[ 12.877242] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
[ 12.877246] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
[ 12.877247] msgmni has been set to 990
[ 12.877250] io scheduler noop registered
[ 12.877251] io scheduler deadline registered
[ 12.877252] io scheduler cfq registered (default)
[ 12.877255] dma-pl330 f8003000.ps7-dma: unable to set the seg size
[ 12.877256] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
[ 12.877257] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
[ 12.877259] e0001000.serial: ttyPS1 at MMIO 0xe0001000 (irq = 82, base_baud = 3124999) is a xuartps
[ 12.877261] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to e085a000
[ 12.877267] brd: module loaded
[ 12.877270] loop: module loaded
[ 12.877272] zynq-qspi e000d000.ps7-qspi: master is unqueued, this is deprecated
[ 12.877273] zynq-qspi e000d000.ps7-qspi: at 0xE000D000 mapped to 0xE085C000, irq=51
[ 12.877276] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
[ 12.877277] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
[ 12.877278] libphy: XEMACPS mii bus: probed
[ 12.877279] mdio_bus e000b000: cannot get PHY at address 7
[ 12.877280] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
[ 12.877282] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 12.877283] ehci-pci: EHCI PCI platform driver
[ 12.877284] ULPI transceiver vendor/product ID 0x0451/0x1507
[ 12.877285] Found TI TUSB1210 ULPI transceiver.
[ 12.877285] ULPI integrity check: passed.
[ 12.877286] zynq-ehci zynq-ehci.0: Xilinx Zynq USB EHCI Host Controller
[ 12.877287] zynq-ehci zynq-ehci.0: new USB bus registered, assigned bus number 1
[ 12.877292] zynq-ehci zynq-ehci.0: irq 53, io mem 0x00000000
[ 12.877296] zynq-ehci zynq-ehci.0: USB 2.0 started, EHCI 1.00
[ 12.877298] hub 1-0:1.0: USB hub found
[ 12.877298] hub 1-0:1.0: 1 port detected
[ 12.877299] usbcore: registered new interface driver usb-storage
[ 12.877301] mousedev: PS/2 mouse device common for all mice
[ 12.877302] i2c /dev entries driver
[ 12.877304] xadcps f8007100.ps7-xadc: enabled: yes reference: external
[ 12.877305] zynq-edac f8006000.ps7-ddrc: ecc not enabled
[ 12.877306] cpu cpu0: dummy supplies not allowed
[ 12.877307] cpufreq_cpu0: failed to get cpu0 regulator: -19
[ 12.877308] Xilinx Zynq CpuIdle Driver started
[ 12.877309] sdhci: Secure Digital Host Controller Interface driver
[ 12.877310] sdhci: Copyright(c) Pierre Ossman
[ 12.877311] sdhci-pltfm: SDHCI platform and OF driver helper
[ 12.877312] sdhci-arasan e0100000.ps7-sdio: dummy supplies not allowed
[ 12.877313] mmc0: no vqmmc regulator found
[ 12.877314] sdhci-arasan e0100000.ps7-sdio: dummy supplies not allowed
[ 12.877315] mmc0: no vmmc regulator found
[ 12.877322] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA
[ 12.877326] usbcore: registered new interface driver usbhid
[ 12.877327] usbhid: USB HID core driver
[ 12.877328] TCP: cubic registered
[ 12.877329] NET: Registered protocol family 17
[ 12.877329] Registering SWP/SWPB emulation handler
[ 12.877331] bootconsole [earlycon0] disabled

dargaud's picture
dargaud
Junior(0)
Question: I only need to

Question: I only need to produce system.bit and devicetree.dtb ?
I can use fsbl.elf, u-boot.elf, uramdisk.image.gz and uImage.bin from the card, right ?
Thanks.

dargaud's picture
dargaud
Junior(0)
Progress...

OK, almost there. I now get to:

...
[ 12.877328] TCP: cubic registered
[ 12.877329] NET: Registered protocol family 17
[ 12.877330] Registering SWP/SWPB emulation handler
[ 12.877331] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[ 12.877335] mmc0: new high speed SDHC card at address 59b4
[ 12.877336] Freeing unused kernel memory: 196K (c0672000 - c06a3000)
[ 12.877339] mmcblk0: mmc0:59b4 NCard 14.7 GiB
[ 12.877340] mmcblk0: p1
INIT: version 2.88 booting
Starting Bootlog daemon: bootlogd.
Creating /dev/flash/* device nodes
[ 12.877351] random: dd urandom read with 7 bits of entropy available
Configuring network interfaces... [ 12.877347] xemacps e000b000.ps7-ethernet: eth0: no PHY found
[ 12.877348] xemacps e000b000.ps7-ethernet: XEMACPS mii bus mii_probe fail.
ifconfig: SIOCSIFFLAGS: No such device or address
starting Busybox inet Daemon: inetd... done.
INIT: Entering runlevel: 5
Starting Dropbear SSH server: Will output 1024 bit rsa secret key to '/etc/dropbear/dropbear_rsa_host_key'
Generating key, this may take a while...
Public key portion is:
ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAAAgwCdzj9ip66OT9BEuPp3x+ptaq1YlJYwNul3M7KMQx4DWdgO+TMYL4nauHb0HHJcO8cUJvbvDmRqc6afaJ34n80N4lUVrGkLrO5g3lJq
Fingerprint: md5 3b:86:db:74:04:36:38:a0:f1:67:18:54:41:7a:5f:8c
dropbear.
Stopping Bootlog daemon: bootlogd.
Starting tcf-agent: OK

INIT: Id "PS0" respawning too fast: disabled for 5 minutes
INIT: no more processes left in this runlevel
INIT: Id "PS0" respawning too fast: disabled for 5 minutes

But then it hangs. I'm using serial port 1 instead of 0, as shown in the dts file:
bootargs = "console=ttyPS1,115200 root=/dev/ram rw earlyprintk";
linux,stdout-path = "/amba@0/serial@e0001000";
Could that be the reason (say init expects the console to be on port 0). Any other idea ?