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  1. VGA on Zedboard

    ... singal. I searched the characters "0x0000_12E1" in the TRM file, but no results returned. So these must no be any information about the ...

    parallelcell - 2012-09-10 07:42 - 8 comments

  2. Run-Time Reconfiguration on ZedBoard

    ... DESIGN SUITE -->create block design -->generate output file -->generate hdl wrapper -->generate bitstream -->export hardware ...

    efaz - 2016-01-18 05:10 - 3 comments

  3. how to control AXI ip core modules (SPI) in Programmable Logic instead of PS

    ...   In Vivado, you can locate that by going to your design file (.bd) right click in the white space, click on Add-IP, type in "BRAM" in ...

    sam025023 - 2014-04-08 11:24 - 5 comments

  4. TCL Script to help with PL Design

    ... on writing Verilog), so if you see any issue, please file an Issue in Github for me! I plan on getting screenshots of how to do ...

    stiggy87 - 2012-10-29 15:10 - 5 comments

  5. Problem in reading RxFIFO of SPI controller in custom board

    ... example code for the SPI controller listed in the system.mss file in the SDK next to the SPI peripheral drivers section to see if you have ...

    naveentejapv - 2014-01-15 02:38 - 3 comments

  6. Error while running a cpp project on xillinux on zedboard but no error for running in Linux PC.

    ... am getting assertion failure problem in TComPrediction.cpp file(Line no:501). it is available in the path ...

    mahesh418.g - 2012-11-03 01:39 - 7 comments

  7. confused about axi ps-pl interfacing

    ... your design from Vivado to the SDK open up the system.mss file (under the 'bsp folder to the left in the Project Explorer pane if it did ...

    smvo555 - 2014-06-13 08:54 - 7 comments

  8. Controlling the PMOD on the MicroZed

    ... Is that possible to include these MIO pins in the file system of the Linux OS? ...

    physics - 2013-10-24 06:21 - 5 comments

  9. Board Definition and Recustomize IP

    ... PicoZed board definition and saved the configuration to a file. I then opened the new project with the block design that I wanted to ...

    josephsamson - 2014-12-23 08:16 - 2 comments

  10. I've just received a ZedBoard, Use it as a FPGA

    ... comes in on LOC Y9. You may need to add GCLK to the .ucf file. Top ...

    Akael - 2013-01-19 23:38 - 3 comments